36 research outputs found

    Relaxation of strained silicon on Si0.5Ge0.5 virtual substrates

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    Strain relaxation has been studied in tensile strained silicon layers grown on Si0.5Ge0.5 virtual substrates, for layers many times the critical thickness, using high resolution x-ray diffraction. Layers up to 30 nm thick were found to relax less than 2% by the glide of preexisting 60° dislocations. Relaxation is limited because many of these dislocations dissociate into extended stacking faults that impede the dislocation glide. For thicker layers, nucleated microtwins were observed, which significantly increased relaxation to 14%. All these tensile strained layers are found to be much more stable than layers with comparable compressive strain

    Reverse graded relaxed buffers for high Ge content SiGe virtual substrates

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    An innovative approach is proposed for epitaxial growth of high Ge content, relaxed Si1−xGex buffer layers on a Si(001) substrate. The advantages of the technique are demonstrated by growing such structures via chemical vapor deposition and their characterization. Relaxed Ge is first grown on the substrate followed by the reverse grading approach to reach a final buffer composition of 0.78. The optimized buffer structure is only 2.8 ”m thick and demonstrates a low surface threading dislocation density of 4×106 cm−2, with a surface roughness of 2.6 nm. The buffers demonstrate a relaxation of up to 107%

    Low frequency noise in Si and Si/SiGe/Si PMOSFETs

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    Measurements of 1/f noise in Si and Si0.64Ge0.36 PMOSFETs have been compared with theoretical models of carrier tunnelling into the oxide. Reduced noise is observed in the heterostructure device as compared to the Si control. We suggest that this is primarily associated with an energy dependent density of oxide trap states and a displacement of the Fermi level at the SiO2 interface in the heterostructure relative to Si. The present study also emphasizes the important role of transconductance enhancement in the dynamic threshold mode in lowering the input referred voltage noise
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