A supercapacitor based enhancement technique for stand-alone surge protection circuits

With the International Technology Roadmap for Semiconductors predicting below-25nm feature-size VLSIs, powered by DC power supplies of less than 1V, protection against transients has become mandatory for modern electronic systems. Surge protection circuits are usually designed using non-linear devices such as metal oxide varistors and semiconductor devices and these devices are rated for short-term energy absorption, based on transient waveforms defined by standards such as IEEE C62.41. Despite their very low voltage DC ratings, supercapacitors are characterized by large time constants and significant continuous energy absorption ratings. This paper presents details of a patent-pending technique where multi-winding magnetic core with a supercapacitor based energy absorber stage can be combined with the commonly used non-linear devices, for enhanced protection. Comparison of the supercapacitor-enhanced circuit together with a commercial surge protection circuit is provided

A supercapacitor technique for efficiency improvement in linear regulators

Paper describes a novel supercapacitor based approach to recover the wasted energy in linear regulators. In this US patent pending technique, a single supercapacitor or an array of supercapacitors could be coupled with a linear series or shunt regulator, where the supercapacitors are charged by the input current of the regulator. This supercapacitor technique, by maintaining the dropout voltage limit before a new capacitor is placed in the series path, recovers the energy and does not use the supercapacitors for voltage conversion. Average efficiency of the overall circuit is improved by a significant amount, while maintaining the useful hall marks of a linear regulator. An example of a 12 to 5 volt proof of concept circuit is detailed with an overall efficiency improvement from 42% to over 78%. The technique is versatile, and, can be developed further to compete with the higher efficiency switching power supplies

Implementation of the supercapacitor-assisted surge absorber (SCASA) technique in a practical surge protector

Their combination of large continuous energy ratings and very large time constants allows supercapacitors to be used in surge protection circuits. This fact, supported by recent research publications and laboratory tests, has assisted the authors to propose a new surge protection circuit topology known as the supercapacitor-assisted surge absorber (SCASA). This technique utilizes a multi-winding transformer, common surge protector devices such as metal oxide Varistors (MOV) and/or semiconductor types combined with a supercapacitor sub-circuit to absorb part of the surge energy usually expected to dissipate within the MOV or the semiconductor. The paper presents design details and test results for a differential mode surge protector based on the SCASA technique where the test device was subjected to lightning-type surges defined in international standards for Class-A and Class B type protectors. The performance of a prototype based on Class-B waveforms of up to 6.6 kV surges generated from a lightning surge simulator are discussed in the paper. Its performance is compared with two commercially available surge protectors

Surge endurance capability testing of supercapacitor families

Supercapacitors are usually low voltage, high capacity devices with milliohm order equivalent series resistances. They usually have time constants from fractional seconds to seconds. Due to these long time constants, compared to the time durations of power line transients in the range of few microseconds to several 100 microseconds, these devices may be able to withstand short duration surges with energy values specified in IEEE C62-41 series and IEC 61400-4-5 and similar standards. However there is little or no manufacturer data sheet information on these aspects. The paper provides the details of a test procedure to test the surge withstand capability of supercapacitors. In addition, essential details of a customized tester interface required for a lightning surge simulator and surge-endurance test results for three supercapacitor families are also presented

Surge capability testing of supercapacitor families using a lightning surge simulator

Supercapacitors (SCs) are capable of storing energy in the range of fractional joules to several thousands of joules despite their lower dc voltage ratings. Farad-order capacitances combined with milliohm-order equivalent series resistances provide time constants ranging from fractional seconds to seconds. Given these time constants, compared to the time durations of power line transients in the range of a few microseconds to several hundreds of microseconds, these devices may be able to withstand short-duration surges with energy values specified in IEEE C62-XX series, IEC 61400-4-5, and similar standards. However, there is little or no manufacturer datasheet information on these aspects. This paper provides details of an automatic tester interfaced with a lightning surge simulator, a test procedure, and summarized test data on three different families of SCs. The test data set provides some valuable insight in estimating the capabilities of these new SC families to withstand surges and transients, which, in turn, could lead to nontraditional applications

Very low frequency supercapacitor techniques to improve the end-to-end efficiency of DC-DC converters based on commercial off the shelf LDOs

Given the advantages of linear regulator techniques, low dropout regulator ICs are frequently used in portable consumer electronics. Only disadvantage in linear regulators, low efficiency, can be overcome by a very low frequency supercapacitor energy recovery technique to achieve efficiencies similar to common switching regulator techniques. This technique was successfully applied in a 12 V to 5 V regulator. The article provides some generalized theoretical background and different supercapacitor circulating options which can be applied to different cases of linear regulators

A low frequency supercapacitor circulation technique to improve the efficiency of linear regulators based on LDO ICs

Linear regulators have output specifications far superior to switch-mode techniques, except for the overall efficiency. This efficiency limitation can be overcome by applying a very low frequency supercapacitor circulation technique at the input side of a low dropout regulator IC. The technique was proven in 12V to 5 V versions, and, can be easily applied to other power supplies such as 5 to 3.3V or 5 to 1.5V versions required by various processors. The paper outlines the concepts and experimental results related to this technique. With the commercial LDO chips available with output current ratings up to 10A, and, thin profile supercapacitors available are with DC voltage ratings from 2.3V to 5.5V, the technique assists developing medium current linear regulators which could compete with present day switch-mode power supplies in efficiency and compactness, maintaining the superior output specifications of a linear regulator

Hardware Efficient Direct Policy Imitation Learning for Robotic Navigation in Resource-Constrained Settings

Direct policy learning (DPL) is a widely used approach in imitation learning for time-efficient and effective convergence when training mobile robots. However, using DPL in real-world applications is not sufficiently explored due to the inherent challenges of mobilizing direct human expertise and the difficulty of measuring comparative performance. Furthermore, autonomous systems are often resource-constrained, thereby limiting the potential application and implementation of highly effective deep learning models. In this work, we present a lightweight DPL-based approach to train mobile robots in navigational tasks. We integrated a safety policy alongside the navigational policy to safeguard the robot and the environment. The approach was evaluated in simulations and real-world settings and compared with recent work in this space. The results of these experiments and the efficient transfer from simulations to real-world settings demonstrate that our approach has improved performance compared to its hardware-intensive counterparts. We show that using the proposed methodology, the training agent achieves closer performance to the expert within the first 15 training iterations in simulation and real-world settings.Validerad;2024;Nivå 2;2024-01-22 (joosat);Full text license: CC BY</p