25 research outputs found

    Optimal Subcube Allocation in a Circuit-Switched Faulty Hypercube

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    Design of Totally Self-Checking Asynchronous Sequential Machines

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    117 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1975.U of I OnlyRestricted to the U of I community idenfinitely during batch ingest of legacy ETD

    Parallel computing on distributed memory multiprocessors

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    OPTIMAL SUBCUBE ALLOCATION IN A CIRCUIT-SWITCHED FAULTY HYPERCUBE

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    In this paper, we present a scheme where a (d;1)-dimensional subcube is allocated in a faulty d-dimensional circuit-switched hypercube in the presence of up to 2 (d;1) faulty nodes. The scheme is then extended to allocate a (d; 1)-dimensional subcube in the presence of a combination of faulty nodes and faulty links. Theoretical proofs and simulation results are presented to analyze the performance of the scheme

    Enhanced Cluster k-Ary n-Cube, A Fault-Tolerant Multiprocessor

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    Abstract—In this paper, we present a strongly fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. Our design augments the k-ary n-cube with ðk jÞn spare nodes. Each set of jn regular nodes is connected to a spare node and the spare nodes are interconnected as either a ðk k k jÞ-ary n-cube if j 6 2 or a hypercube of dimension n if j 2. Our approach utilizes the capabilities of the wave-switching communication modules of the spare nodes to tolerate a large number of faulty nodes. Both theoretical and experimental results are examined. Compared with other proposed schemes, our approach can tolerate significantly more faulty nodes with a low overhead and no performance degradation

    A Real-Time Fault-Tolerant k-ary n-cube Multiprocessor

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    www.engr.newpaltz.edu/~bai eewww.eng.ohio-state.edu/~ozguner Abstract:- We present a real-time fault-tolerant design for the k-ary n-cube multiprocessor and examine its reconfigurability. The k-ary n-cube is augmented by spare nodes at stages one and two. We consider two modes of operations, one under heavy computation or hard deadline and the other under light computation or soft deadline. We assume that faulty nodes cannot compute, but retain their ability to communicate. Our approach utilizes the capabilities of the wave-switching communication modules of the spare nodes to tolerate a large number of faulty nodes and faulty links. Both theoretical and simulation results are examined. Compared with other proposed schemes, our approach can tolerate significantly more faulty nodes and faulty links with a low overhead and no performance degradation
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