2 research outputs found

    Droplet-Confined Alternate Pulsed Epitaxy of GaAs Nanowires on Si Substrates down to CMOS-Compatible Temperatures

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    We introduce droplet-confined alternate pulsed epitaxy for the self-catalyzed growth of GaAs nanowires on Si(111) substrates in the temperature range from 550 °C down to 450 °C. This unconventional growth mode is a modification of the migration-enhanced epitaxy, where alternating pulses of Ga and As<sub>4</sub> are employed instead of a continuous supply. The enhancement of the diffusion length of Ga adatoms on the {11̅0} nanowire sidewalls allows for their targeted delivery to the Ga droplets at the top of the nanowires and, thus, for a highly directional growth along the nanowire axis even at temperatures as low as 450 °C. We demonstrate that the axial growth can be simply and abruptly interrupted at any time without the formation of any defects, whereas the growth rate can be controlled with high accuracy down to the monolayer scale, being limited only by the stochastic nature of nucleation. Taking advantage of these unique possibilities, we were able to probe and describe quantitatively the population dynamics of As inside the Ga droplets in specially designed experiments. After all, our growth method combines all necessary elements for precise growth control, in-depth investigation of the growth mechanisms and compatibility with fully processed Si-CMOS substrates

    Correlation of Electrical and Structural Properties of Single As-Grown GaAs Nanowires on Si (111) Substrates

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    We present the results of the study of the correlation between the electrical and structural properties of individual GaAs nanowires measured in their as-grown geometry. The resistance and the effective charge carrier mobility were extracted for several nanowires, and subsequently, the same nano-objects were investigated using X-ray nanodiffraction. This revealed a number of perfectly stacked zincblende and twinned zincblende units separated by axial interfaces. Our results suggest a correlation between the electrical parameters and the number of intrinsic interfaces
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