Improvements in space radiation-tolerant FPGA implementation of land surface temperature-split window algorithm

The trend in satellite remote sensing assignments has continuously been concerning using hardware devices with more flexibility, smaller size, and higher computational power. Therefore, field programmable gate arrays (FPGA) technology is often used by the developers of the scientific community and equipment for carrying out different satellite remote sensing algorithms. This article explains hardware implementation of land surface temperature split window (LST-SW) algorithm based on the FPGA. To get a high-speed process and real-time application, VHSIC hardware description language (VHDL) was employed to design the LST-SW algorithm. The paper presents the benefits of the used Virtex-4QV of radiation tolerant series FPGA. The experimental results revealed that the suggested implementation of the algorithm using Virtex4QV achieved higher throughput of 435.392 Mbps, and faster processing time with value of 2.95 ms. Furthermore, a comparison between the proposed implementation and existing work demonstrated that the proposed implementation has better performance in terms of area utilization; 1.17% reduction in number of Slice used and 1.06% reduction in of LUTs. Moreover, the significant advantage of area utilization would be the none use of block RAMs comparing to existing work using three blocks RAMs. Finally, comparison results show improvements using the proposed implementation with rates of 2.28% higher frequency, 3.66 x higher throughput, and 1.19% faster processing time

Hardware pipelined architecture with reconfigurable key based on the AES algorithm and hamming code for the earth observation satellite application: Sentinel-2 satellite data case

Earth Observation Satellite has facilitated the study of the earth’s environment and become powerful in various applications such as: Land temperature, Land use, urban monitoring, defense, etc. Additionally, the transmission of this image captured from the EOS to the earth must be confidential and secure against illegal access, and without data corruption. However, this task remains challenging due to the space radiation environment that could affect the satellite’s hardware, and lead to corrupted data. These issues motivate our study to provide an enhanced approach to securing the satellite and ground station link. In this paper, we propose a secure implementation-based radiation-hardened Virtex-4QV FPGA. The secure implementation utilizes a combined architecture between the AES algorithm and Hamming code to ensure security. The most significant advantage of the proposed implementation is the use of the three keys 128/192/256 bits with the pipelined architecture which leads to a high throughput and a high level of security. Based on several security criteria, the suggested cryptosystem findings demonstrate the system’s effectiveness in terms of security. Therefore, this proposed solution can be used and utilized in the EOS application