Isotope effects on the lattice parameter of cubic SiC

Path-integral molecular dynamics simulations in the isothermal-isobaric (NPT) ensemble have been carried out to study the dependence of the lattice parameter of 3C-SiC upon isotope mass. This computational method allows a quantitative and nonperturbative study of such anharmonic effect. Atomic nuclei were treated as quantum particles interacting via a tight-binding-type potential. At 300 K, the difference Delta a between lattice parameters of 3C-SiC crystals with 12C and 13C amounts to 2.1 x 10^{-4} A. The effect due to Si isotopes is smaller, and amounts to 3.5 x 10^{-5} A when replacing 28Si by 29Si. Results of the PIMD simulations are interpreted in terms of a quasiharmonic approximation for the lattice vibrations.Comment: 4 pages, 3 figure

4H–SiC photoconductive switching devices for use in high-power applications

Siliconcarbide is a wide-band-gapsemiconductor suitable for high-power high-voltage devices and it has excellent properties for use in photoconductive semiconductor switches (PCSSs). PCSS were fabricated as planar structures on high-resistivity 4H–SiC and tested at dc bias voltages up to 1000 V. The typical maximum photocurrent of the device at 1000 V was about 49.4 A. The average on-state resistance and the ratio of on-state to off-state currents were about 20 Ω and 3×1011, respectively. Photoconductivity pulse widths for all applied voltages were 8–10 ns. These excellent results are due in part to the removal of the surface damage by high-temperature H2 etching and surface preparation. Atomic force microscopy images revealed that very good surface morphology, atomic layer flatness, and large step width were achieved

Si/SiC bonded wafer: a route to carbon free SiO2 on SiC

This paper describes the thermal oxidation of Si/SiC heterojunction structures, produced using a layer-transfer process, as an alternative solution to fabricating SiC metal-oxide-semiconductor (MOS) devices with lower interface state densities (Dit). Physical characterization demonstrate that the transferred Si layer is relatively smooth, uniform, and essentially monocrystalline. The Si on SiC has been totally or partially thermally oxidized at 900–1150 °C. Dit for both partially and completely oxidized silicon layers on SiC were significantly lower than Dit values for MOS capacitors fabricated via conventional thermal oxidation of SiC. The quality of the SiO2, formed by oxidation of a wafer-bonded silicon layer reported here has the potential to realize a number of innovative heterojunction concepts and devices, including the fabrication of high quality and reliable SiO2 gate oxides

Electrical Characteristics of a 6H-SiC Epitaxial Layer Grown by Chemical Vapor Deposition on Porous SiC Substrate

Porous SiC (PSC) has been proposed as a buffer layer for reducing defects in epitaxial SiC layers. In this study, electrical characteristics of a 6H-SiC epitaxial layer grown by chemical vapor deposition on a porous SiC substrate (SiC-on-PSC) have been compared to those simultaneously grown on a standard SiC substrate (SiC-on-STD). Schottky barrier diodes (SBDs) have been fabricated on both epitaxial layers and then investigated with temperature-dependent current-voltage (I-V), capacitance-voltage (C-V), and deep-level transient spectroscopy (DLTS) measurements. The SBDs on both SiC-on-PSC and SiC-on-STD show about the same I-V and C-V characteristics, and at least four electron traps, i.e., B (0.75 eV), C (0.63 eV), D (0.40 eV), and E (0.16 eV), can be identically found in both SBDs by DLTS measurements. Thus, we conclude that the electrical quality of SiC-on-PSC is comparable to that of SiC-on-STD, and that the higher breakdown voltages observed in SBDs on SiC-on-PSC are not obviously related to a different defect structure