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    1 research outputs found

    A closed-loop ASIC design approach based on logical effort theory and artificial neural networks

    Author
    1. Alioto
    2. Alioto
    3. Avci
    4. Boyd
    5. Boyd
    6. Boyd
    7. Cao
    8. Chinnery
    9. Chinnery
    10. CVX Research
    11. Djeffala
    12. Gerosa
    13. Gunes
    14. Guruswamy
    15. Jafari
    16. Kahraman
    17. Kahraman
    18. Kunwar Singh
    19. Mandal
    20. Maneesha Gupta
    21. Oklobdzija
    22. Palumbo
    23. Sapatnekar
    24. Satish Chandra Tiwari
    25. Sutherland
    26. Weste
    27. Wolfe
    Publication venue
    'Elsevier BV'
    Publication date
    Field of study
    No full text
    Crossref
    corecore

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