A universal colour transformation architecture

A real-time transformation hardware for RGB to other colour models is presented here. Eight colour spaces, namely CMY, YIQ, HSV, HLS, CIEXYZ, CIExrY, CIELa*b* and YCrCb, have been tested for the system. Hardware results have then been compared against those generated by algorithmic implementations using floating point arithmetic for accuracy

A hardware FPGA implementation of a 2-D median filter using a novel rank adjustment technique

This paper presents the design and implementation on a Field Programmable Gate Array (FPGA) of a 2-D median filter, which is capable of obtaining a median value every clock cycle. The device is designed to operate in rear-time with rates of over 80 megasamples per second on n-bit sample sequences. Also, the operation speed remains constant regardless of the size of the selected mask N