123 research outputs found

    NanoFS: a hardware-oriented file system

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    NanoFS is a novel file system for embedded systems and storage-class memories (like flash) and is specially designed to be directly implemented in hardware. NanoFS is based on an original internal layout intended to achieve an optimal hardware implementation of the file system’s file lookup and data fetch operations. File system spe-cification on a sample reader module completely implemented in a pro-grammable device is introduced

    Minimalistic SDHC-SPI hardware reader module for boot loader applications

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    This paper introduces a low-footprint full hardware boot loading solution for FPGA-based Programmable Systems on Chip. The proposed module allows loading the system code and data from a standard SD card without having to re-program the whole embedded system. The hardware boot loader is processor independent and removes the need of a software boot loader and the related memory resources. The hardware overhead introduced is manageable, even in low-range FPGA chips, and negligible in mid- and high-range devices. The implementation of the SD card reader module is explained in detail and an example of a multi-boot loader is offered as well. The multi-boot loader is implemented and tested with the Xilinx's Picoblaze microcontroller

    Nanocrystalline diamond-glass platform for the development of three-dimensional micro- and nanodevices

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    Low-cost and robust platforms are key for the development of next-generation 3D micro- and nanodevices. To fabricate such platforms, nanocrystalline diamond (NCD) is a highly appealing material due to its biocompatibility, robustness, and mechanical, electrical, electrochemical, and optical properties, while glass substrates with through vias are ideal interposers for 3D integration due to the excellent properties of glass. However, developing devices that comprise NCD films and through glass vias (TGVs) has rarely been attempted due to a lack of effective process strategies. In this work, a low-cost process - free of photolithography and transfer-printing - for fabricating arrays of TGVs that are sealed with suspended portions of an ultra-thin NCD film on one side is presented. These highly transparent structures may serve as a platform for the development of microwells for single-cell culture and analysis, 3D integrated devices such as microelectrodes, and quantum technologies. The process is demonstrated by fabricating TGVs that are sealed with an NCD film of thickness 175 nm and diameter 60 mu m. The technology described can be extended by replacing NCD with silicon nitride or silicon carbide, allowing for the development of complex heterogeneous structures on the small scale

    Automated performance evaluation of skew-tolerant clocking schemes

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    In this paper the authors evaluate the timing and power performance of three skew-tolerant clocking schemes. These schemes are the well known master–slave clocking scheme (MS) and two schemes developed by the authors: Parallel alternating latches clocking scheme (PALACS) and four-phase parallel alternating latches clocking scheme (four-phase PALACS). In order to evaluate the timing performance, the authors introduce algorithms to obtain the clock waveforms required by a synchronous sequential circuit. Separated algorithms were developed for every clocking scheme. From these waveforms it is possible to get parameters such as the non-overlapping time and the clock period. They have been implemented in a tool and have been used to compare the timing performance of the clocking schemes applied to a simple circuit. To analyse the power consumption the authors have electrically simulated a simple circuit for several operation frequencies. The most remarkable conclusion is that it is possible to save about 50% of the power consumption of the clock distribution network by using PALACS.Ministerio de Ciencia y Tecnología TEC 2004-00840/MI

    Boundary curvature effect on the wrinkling of thin suspended films

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    A relation between the boundary curvature κ and the wrinkle wavelength λ of a thin suspended film under boundary confinement is demonstrated. Experiments were performed with nanocrystalline diamond films of approximate thickness 184nm grown on glass substrates. By removing portions of the substrates after growth, suspended films with circular boundaries of radius 30–811 μm were fabricated. Due to residual stresses, the portions of the film bonded to the substrate are of approximate compressive prestrain 11×10⁻⁴ and the suspended portions of the film are azimuthally wrinkled at their boundary. Measurements show that λ decreases monotonically with κ, and a simple model that is in line with this trend is proposed. The model can be applied to design devices with functional wrinkles and can be adapted to gain insight into other systems such as plant leaves. A method for measuring residual compressive strain in thin films, which complements standard strain characterization methods, is also described

    A First Approach to Build Product Lines of Multi-organizationalWeb Based Systems (MOWS)

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    From the recent past and current state of the Internet, it is possible to forecast a wide growing of Multi Organizational Web–based Systems (MOWS). Therefore, the reduction of both costs and time–to–market is desirable. On the other hand, the success of building software in Product Lines (PL) is being demonstrated in different contexts reducing both time–to–market and costs. However, research on PL topics has not been oriented to include web–based assets. In this article, we propose a first approach to use PL methodologies to build MOWS.We identify quality aspects as a key point when building Product Lines of MOWS and we give a way to specify quality aspects in PL.Ministerio de Ciencia y Tecnología TIC 2003-02737-C02-0

    Early stages of polycrystalline diamond deposition: laser reflectance at substrates with growing nanodiamonds

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    The chemical vapor deposition of polycrystalline diamond (PCD) films is typically done on substrates seeded with diamond nanoparticles. Specular laser reflectance has been used in tandem with a continuous film model to monitor the thickness of these films during their deposition. However, approaches to gain information on properties that strongly affect film morphology, such as the areal density of seeds, remain largely unexplored. This work outlines a strategy for using laser reflectance measurements to refine the monitoring of film thickness during deposition, estimate the mean equivalent radii and the areal density of seeds, and estimate growth incubation periods. We present a general model based on the Rayleigh theory of scattering for laser reflectance at substrates with growing nanoparticles that captures the early stages of PCD deposition. We test our model experimentally by depositing diamond under identical conditions on silicon substrates with various seed densities and by comparing seed densities obtained by scanning electron microscopy to those determined by our strategy. We also explore the different deposition stages for which our model and a continuous film model can be used safely. In addition to providing guidelines for characterizing PCD deposition, this work may also advance the general understanding of nanoparticle growth and formation

    Block copolymer–nanodiamond coassembly in solution: towards multifunctional hybrid materials

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    Polymer-nanodiamond composites are excellent candidates for the fabrication of multifunctional hybrid materials. They integrate polymer flexibility and exceptional properties of nanodiamonds (NDs), such as biocompatibility, mechanical strength, color centers, and chemically-tailored surfaces. However, their development is hindered by the challenge of ensuring that NDs are homogeneously distributed in the composites. Here, we exploit colloidal coassembly between poly(isoprene-b-styrene-b-2-vinyl pyridine) (ISV) block copolymers (BCPs) and NDs to avoid ND self-agglomeration and direct ND spatial distribution. NDs were first air oxidized at 450 degrees C to obtain stable dispersions in dimethylacetamide (DMAc). By adding ISV into the dispersions, patchy hybrid micelles were formed due to H-bonds between NDs and ISV. The ISV-ND coassembly in DMAc was then used to fabricate nanocomposite films with a uniform sub-50 nm ND distribution, which has never been previously reported for an ND loading [Formula: see text] of more than 50 wt%. The films exhibit good transparency due to their well-defined nanostructures and smoothness and also exhibit an improved UV-absorption and hydrophilicity compared to neat ISV. More intriguingly, at a [Formula: see text] of 22 wt%, ISV and NDs coassemble into a network-like superstructure with well-aligned ND strings via a dialysis method. Transmission electron microscopy and dynamic light scattering measurements suggest a complex interplay between polymer-polymer, polymer-solvent, polymer-ND, ND-solvent, and ND-ND interactions during the formation of structures. Our work may provide an important foundation for the development of hierarchically ordered nanocomposites based on BCP-ND coassembly, which is beneficial for a wide spectrum of applications from biotechnology to quantum devices

    Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates

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    Power modeling techniques have traditionally neglected the main part of the energy consumed in the internal nodes of static CMOS gates: the power dissipated by input transitions that do not produce output switching. In this work, we present an experimental set-up that shows that this power component may contribute up to 59% of the total power consumption of a gate in modern technologies. This fact makes very important to include it into any accurate power modelMinisterio de Educación y Ciencia HYPER MIC TEC2007-6180

    Static Power Consumption in CMOS Gates Using Independent Bodies

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    It has been reported that the use of independent body terminals for series transistors in static bulk-CMOS gates improves their timing and dynamic power characteristics. In this paper, the static power consumption of gates using this approach is addressed. When compared to conventional common body static CMOS, important static power enhancements are obtained. Accurate electrical simulation results reveals improvements up to 35% and 62% in NAND and NOR gates respectively.Ministerio de Educación y Ciencia META TEC-2004-00840-MICJunta de Andalucía CICE DHPMNDS EXC-TIC-1023Junta de Andalucía CICE DHPMNDS EXC-TIC-63
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