Controlling monoclonal antibody product quality using High Throughput Systems (HTS)

Enhancing throughput of bioprocess development has become increasingly important to rapidly screen and optimize cell culture process parameters. The need to conduct large numbers of experiments has resulted in the use of miniaturized high-throughput (HT) technology for bioprocess development. Advanced Microscale Bioreactors (ambr™) is an automated micro-bioreactor system with miniature single-use bioreactors with a 10-15 mL working volume controlled by an automated workstation. We used Ambr15 to perform cell culture studies to optimize and control product quality attribute of monoclonal antibody. The large number of samples produced from these experiments greatly exceeded the capacity of traditional analytical assay so we used the LabChip® microfluidics platform to analyze the product quality of the monoclonal antibody. The microfluidic LabChip provided a high-throughput workflow for data generation and analysis of sample purity and quantification with the capability to resolve low level impurities under reducing and non-reducing conditions

Autonomous soft-error tolerance of FPGA configuration bits

Field-programmable gate arrays (FPGAs) are increasingly susceptible to radiation-induced single event upsets (SEUs). These upsets are predominant in a space environment; however, with increasing use of static RAM (SRAM) in modern FPGAs, these SEUs are gaining prominence even in a terrestrial environment. SEUs can flip SRAM bits of FPGA, potentially altering the functionality of the implemented design. This has motivated FPGA designers to investigate techniques to protect the FPGA configuration bits against such inadvertent bit flips (soft error). Traditionally, triple modular redundancy (TMR) is used to protect the FPGA bit flips. Increasing design complexity and limited battery life motivate for alternative approaches for soft-error tolerance. In this article, we propose a technique to improve autonomous fault-masking capabilities of a design by maximizing the number of zeros or ones in lookup tables (LUTs). The technique analyzes critical configuration bits and utilizes spare resources (XOR gates and carry chains) of FPGAs to selectively manipulate the logic implemented in LUTs using two operations: LUT restructuring and LUT decomposition. We implemented the proposed approach for Xilinx Virtex-6 FPGAs and validated the same with a wide set of designs from the MCNC, IWLS 2005, and ITC99 benchmark suites. Results demonstrate that the proposed logic restructuring maximizes logic 0 (or 1) of LUTs by an average of 20%, achieving 80% fault masking with no area overhead. The fault rate of the entire design is reduced by 60% on average as compared to the existing techniques. Furthermore, the logic decomposition algorithm provides incremental fault-tolerance capabilities and achieves an additional 5% fault masking with an average 7% increase in slice usage.The complete methodology is implemented into a tool for Xilinx FPGA and is made available online for the benefit of the research community. The algorithms are lightweight, and the whole design flow (including Xilinx Place and Route) was completed in 75 minutes for the largest benchmark in the set.<br/

Metal-mediated alkynediol cycloisomerization: First and second generation formal total syntheses of didemniserinolipid B

A formal total synthesis of didemniserinolipid B was developed by employing a regioselective metal-mediated 6-endo-dig alkynol-cycloisomerization reaction. Two routes for the synthesis of key Burke's intermediate have been developed. Our initial approach involved the introduction of a C17-alkynol followed by Pd-mediated cycloisomerization and then coupling with the serinol unit prior to the introduction of an α,β-unsaturated ester unit through selective oxidation of 1°-OH followed by a two-carbon Wittig homologation. Alternatively, the second generation strategy featuring the serinol coupling with the C17-alkynol followed by alkyne addition to the epoxide and subsequent Au-mediated cycloisomerization of an acetonide protected alkynediol unit has been executed. This approach has avoided several late stage protection–deprotection events

Models for Patch-Based Image Restoration

We present a supervised learning approach for object-category specific restoration, recognition, and segmentation of images which are blurred using an unknown kernel. The novelty of this work is a multilayer graphical model which unifies the low-level vision task of restoration and the high-level vision task of recognition in a cooperative framework. The graphical model is an interconnected two-layer Markov random field. The restoration layer accounts for the compatibility between sharp and blurred images and models the association between adjacent patches in the sharp image. The recognition layer encodes the entity class and its location in the underlying scene. The potentials are represented using nonparametric kernel densities and are learnt from training data. Inference is performed using nonparametric belief propagation. Experiments demonstrate the effectiveness of our model for the restoration and recognition of blurred license plates as well as face images

Ordinal Regression Based Subpixel Shift Estimation for Video Super-Resolution

<p/> <p>We present a supervised learning-based approach for subpixel motion estimation which is then used to perform video super-resolution. The novelty of this work is the formulation of the problem of subpixel motion estimation in a ranking framework. The ranking formulation is a variant of classification and regression formulation, in which the ordering present in class labels namely, the shift between patches is explicitly taken into account. Finally, we demonstrate the applicability of our approach on superresolving synthetically generated images with global subpixel shifts and enhancing real video frames by accounting for both local integer and subpixel shifts.</p