R&D of back-end electronics for improved resistive plate chambers for the phase 2 upgrade of the CMS end-cap muon system

International audienceThe Large Hadron Collider (LHC) at European Organization for Nuclear Research is planned to be upgraded to the high luminosity LHC. Increasing the luminosity makes muon triggering reliable and offline reconstruction very challenging. To enhance the redundancy of the Compact Muon Solenoid (CMS) Muon system and resolve the ambiguity of track reconstruction in the forward region, an improved Resistive Plate Chamber (iRPC) with excellent time resolution will be installed in the Phase-2 CMS upgrade. The iRPC will be equipped with Front-End Electronics (FEE), which can perform high-precision time measurements of signals from both ends of the strip. New Back-End Electronics (BEE) need to be researched and developed to provide sophisticated functionalities such as interacting with FEE with shared links for fast, slow control (SC) and data, in addition to trigger primitives (TPs) generation and data acquisition (DAQ).The BEE prototype uses a homemade hardware board compatible with the MTCA standard, the back-end board (BEB). BEE interacts with FEE via a bidirectional 4.8 Gbps optical paired-link that integrates clock, data, and control information. The clock and fast/slow control commands are distributed from BEB to the FEE via the downlink. The uplink is used for BEB to receive the time information of the iRPC’s fired strips and the responses to the fast/slow control commands. To have a pipelined detector data for cluster finding operation, recover (DeMux) the time relationship of which is changed due to the transmission protocol for the continuous incoming MUXed data from FEE. Then at each bunch crossing (BX), clustering fired strips that satisfy time and spatial constraints to generate TPs. Both incoming raw MUXed detector data and TPs in a time window and latency based on the trigger signal are read out to the DAQ system. Gigabit Ethernet (GbE) of SiTCP and commercial 10-GbE are used as link standards for SC and DAQ, respectively, for the BEB to interact with the server.The joint test results of the BEB with iRPC and Front-End Board (FEB) show a Bit Error Rate of the transmission links less than $1\times {10^{-16}}$, a time resolution of the FEB Time-to-Digital Converter of 16 ps, and the resolution of the time difference between both ends of 160 ps which corresponding a spatial resolution of the iRPC of approximately 1.5 cm.Test results showed the correctness and stable running of the BEB prototype, of which the functionalities fulfill the iRPC requirements

Research and development of the back-end electronics for the two-dimensional improved resistive plate chambers in CMS upgrade

International audienceTo complement and ensure redundancy in the endcap muon system of the Compact Muon Solenoid (CMS) detector and to extend the Resistive Plate Chamber (RPC) system coverage, improved RPCs (iRPCs) with either orthogonal layer strips with one-end electronics or single layer strips with two-end electronics providing more precise time measurement will be installed in the very forward pseudorapidity region of $|\eta |<2.4$. The iRPC readout system needs to support two-dimensional (2D) or two-end readout. In addition, it must combine detector data with Timing, Trigger and fast Control (TTC) and Slow Control (SC) into one data stream over a bi-directional optical link with a line rate of 4.8 Gb/s between the Front-End Electronics (FEE) and the Back-End Electronics (BEE). To fulfill these requirements, a prototype BEE for the iRPC 2D chamber has been researched and designed.A Micro-Telecommunication and Computing Architecture ($\mu$TCA)-based processing card was designed in this study to establish a prototype system together with a $\mu$TCA crate. The Giga-Bit Transceiver (GBT) protocol is integrated to provide bi-directional communication between the FEE and BEE. A server is connected with the BEE by a Gigabit Ethernet (GbE) link for SC and a 10-GbE link for Data AcQuisition (DAQ).The Bit Error Rate (BER) test of the back-end board and a joint test with the iRPC 2D prototype chamber were performed. A BER of less than $1.331\times {10^{-16}}$ was obtained. The time measurement with a resolution of 3.05 ns was successfully realized, and detector efficiencies of 97.7% for longitudinal strips and 96.0% for orthogonal strips were measured. Test results demonstrate the correctness and reliability of the prototype BEE.The BEE prototype satisfies the requirements for the iRPC 2D chamber, and it worked stably and reliably during a long-term joint test run

R&D of back-end electronics for improved resistive plate chambers for the phase 2 upgrade of the CMS end-cap muon system

International audienceThe Large Hadron Collider (LHC) at European Organization for Nuclear Research is planned to be upgraded to the high luminosity LHC. Increasing the luminosity makes muon triggering reliable and offline reconstruction very challenging. To enhance the redundancy of the Compact Muon Solenoid (CMS) Muon system and resolve the ambiguity of track reconstruction in the forward region, an improved Resistive Plate Chamber (iRPC) with excellent time resolution will be installed in the Phase-2 CMS upgrade. The iRPC will be equipped with Front-End Electronics (FEE), which can perform high-precision time measurements of signals from both ends of the strip. New Back-End Electronics (BEE) need to be researched and developed to provide sophisticated functionalities such as interacting with FEE with shared links for fast, slow control (SC) and data, in addition to trigger primitives (TPs) generation and data acquisition (DAQ).The BEE prototype uses a homemade hardware board compatible with the MTCA standard, the back-end board (BEB). BEE interacts with FEE via a bidirectional 4.8 Gbps optical paired-link that integrates clock, data, and control information. The clock and fast/slow control commands are distributed from BEB to the FEE via the downlink. The uplink is used for BEB to receive the time information of the iRPC’s fired strips and the responses to the fast/slow control commands. To have a pipelined detector data for cluster finding operation, recover (DeMux) the time relationship of which is changed due to the transmission protocol for the continuous incoming MUXed data from FEE. Then at each bunch crossing (BX), clustering fired strips that satisfy time and spatial constraints to generate TPs. Both incoming raw MUXed detector data and TPs in a time window and latency based on the trigger signal are read out to the DAQ system. Gigabit Ethernet (GbE) of SiTCP and commercial 10-GbE are used as link standards for SC and DAQ, respectively, for the BEB to interact with the server.The joint test results of the BEB with iRPC and Front-End Board (FEB) show a Bit Error Rate of the transmission links less than $1\times {10^{-16}}$, a time resolution of the FEB Time-to-Digital Converter of 16 ps, and the resolution of the time difference between both ends of 160 ps which corresponding a spatial resolution of the iRPC of approximately 1.5 cm.Test results showed the correctness and stable running of the BEB prototype, of which the functionalities fulfill the iRPC requirements