12 research outputs found
Worst-case MOSFET parameter extraction for a 2μm CMOS process
This paper will describe the process by which realistic nominal and worstcase DC MOSFFT model parameter sets were determined and validated for
a 2μm CMOS technology. The steps involved in this task, which will be
detailed, ranged from the definition of a suitable circuit simulator model.
through the collection of statistical parametric data, to the generation and
verification of the worstcase model sets obtained from this data
Worst-case MOSFET parameter extraction for a 2 /spl mu/m CMOS process
This paper will describe the process by which realistic nominal and worst-case DC MOSFET model parameter sets were determined and validated for a 2 /spl mu/m CMOS technology. The steps involved in this task, which will be detailed, ranged from the definition of a suitable circuit simulator model, through the collection of statistical parametric data, to the generation and verification of the worst-case model sets obtained from this data