53 research outputs found

    Electrical conduction of silicon oxide containing silicon quantum dots

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    Current-voltage measurements have been made at room temperature on a Si-rich silicon oxide film deposited via Electron-Cyclotron Resonance Plasma Enhanced Chemical Vapor Deposition (ECR-PECVD) and annealed at 750 - 1000∘ ^\circC. The thickness of oxide between Si quantum dots embedded in the film increases with the increase of annealing temperature. This leads to the decrease of current density as the annealing temperature is increased. Assuming the Fowler-Nordheim tunneling mechanism in large electric fields, we obtain an effective barrier height ϕeff\phi_{eff} of ∼\sim 0.7 ±\pm 0.1 eV for an electron tunnelling through an oxide layer between Si quantum dots. The Frenkel-Poole effect can also be used to adequately explain the electrical conduction of the film under the influence of large electric fields. We suggest that at room temperature Si quantum dots can be regarded as traps that capture and emit electrons by means of tunneling.Comment: 14 pages, 5 figures, submitted to J. Phys. Conden. Mat

    In Situ Imaging of the Conducting Filament in a Silicon Oxide Resistive Switch

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    The nature of the conducting filaments in many resistive switching systems has been elusive. Through in situ transmission electron microscopy, we image the real-time formation and evolution of the filament in a silicon oxide resistive switch. The electroforming process is revealed to involve the local enrichment of silicon from the silicon oxide matrix. Semi-metallic silicon nanocrystals with structural variations from the conventional diamond cubic form of silicon are observed, which likely accounts for the conduction in the filament. The growth and shrinkage of the silicon nanocrystals in response to different electrical stimuli show energetically viable transition processes in the silicon forms, offering evidence to the switching mechanism. The study here also provides insights into the electrical breakdown process in silicon oxide layers, which are ubiquitous in a host of electronic devices.Comment: 7 pages, 7 figure

    Charge carrier injection and trapping in the buried oxides of SOI structures

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    The electron injection processes in the silicon-on-insulator (SOI) devices affect strongly the reliability of device operation [1]. Usually the buried oxide (BOX)/silicon film interface shows worse structural and electrical properties than that of the gate oxide/silicon film interface [2]. This leads to enhanced charge trapping and degradation of the BOX during SOI device operation. Therefore, the promising perspectives of SOI devices for some applications (especially for high-voltage and high-temperature devices) are often limited by carrier injection processes in the BOX
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