Melting and Crystallization of Si and Ge2Sb2Te5 Nanostructures

Recent technological advances in fabrication processes have allowed for the production of solid-state devices with dimensions as small as ~10 nm. Improving the functionality and efficiency of these devices must come from new technologies and fabrication processes. In this work, two device technologies which are driven by the thermal processes of melting and crystallization are studied in detail. A novel oscillator device concept is explored in which a Si micro-/nanowire exhibits relaxation oscillations as it switches between solid and liquid phases, resulting in large amplitude current pulses. Phase change memory (PCM), a non-volatile memory technology that shows promising scaling and performance to compete with flash memory technology, is also studied through modeling of device performance and a critical fabrication process step. This dissertation demonstrates the interesting phenomenon of a nanoscale Si solid-liquid phase-change oscillator and pulse generator, and that the frequency can be controlled or tuned by various parameters as is demonstrated experimentally and verified with simulations. Simulation results also suggest that the devices have strong scalability into the nanometer scale as electrical breakdown of silicon is expected to be a significant factor, allowing for faster melting of the nanowire and oscillation frequencies \u3e1 GHz. Electrical performance of PCM devices with various geometries and load conditions is analyzed using finite element modeling with temperature dependent parameters, demonstrating the impact of load conditions and incremental geometry variations. This dissertation also discusses a model for crystallization of Ge2Sb2Te5 (GST) which is able to simulate the crystallization of an arbitrarily shaped GST nanostructure during any annealing conditions or electrical device operation, developed in collaboration with fellow group member Zachary Woods. A model for void formation is developed and incorporated into the crystallization model, as voids occur during crystallization due to the density change between amorphous and crystalline phases. This model offers the utility of capturing the nanoscale phenomena of incubation, nucleation, growth and void formation in GST, and closely agrees with various experiments performed at IBM and elsewhere in the literature

Self-heating of silicon microwires: Crystallization and thermoelectric effects

We describe experiments on self-heating and melting of nanocrystalline silicon microwires using single high-amplitude microsecond voltage pulses, which result in growth of large single-crystal domains upon resolidification. Extremely high current densities (>20 MA/cm(2)) and consequent high temperatures (1700 K) and temperature gradients (1 K/nm) along the microwires give rise to strong thermoelectric effects. The thermoelectric effects are characterized through capture and analysis of light emission from the self-heated wires biased with lower magnitude direct current/alternating current voltages. The hottest spot on the wires consistently appears closer to the lower potential end for n-type microwires and to the higher potential end for p-type microwires. The experimental light emission profiles are used to verify the mathematical models and material parameters used for the simulations. Good agreement between experimental and simulated profiles indicates that these models can be used to predict and design optimum geometry and bias conditions for current-induced crystallization of microstructures