1,480 research outputs found
Performance of FORTRAN floating-point operations on the Flex/32 multicomputer
A series of experiments has been run to examine the floating-point performance of FORTRAN programs on the Flex/32 (Trademark) computer. The experiments are described, and the timing results are presented. The time required to execute a floating-point operation is found to vary considerbaly depending on a number of factors. One factor of particular interest from an algorithm design standpoint is the difference in speed between common memory accesses and local memory accesses. Common memory accesses were found to be slower, and guidelines are given for determinig when it may be cost effective to copy data from common to local memory
A Parallel Rendering Algorithm for MIMD Architectures
Applications such as animation and scientific visualization demand high performance rendering of complex three dimensional scenes. To deliver the necessary rendering rates, highly parallel hardware architectures are required. The challenge is then to design algorithms and software which effectively use the hardware parallelism. A rendering algorithm targeted to distributed memory MIMD architectures is described. For maximum performance, the algorithm exploits both object-level and pixel-level parallelism. The behavior of the algorithm is examined both analytically and experimentally. Its performance for large numbers of processors is found to be limited primarily by communication overheads. An experimental implementation for the Intel iPSC/860 shows increasing performance from 1 to 128 processors across a wide range of scene complexities. It is shown that minimal modifications to the algorithm will adapt it for use on shared memory architectures as well
Dynamic reconfiguration technologies based on FPGA in software defined radio system
Partial Reconfiguration (PR) is a method for Field Programmable Gate Array (FPGA) designs which allows multiple applications to time-share a portion of an FPGA while the rest of the device continues to operate unaffected. Using this strategy, the physical layer processing architecture in Software Defined Radio (SDR) systems can benefit from reduced complexity and increased design flexibility, as different waveform applications can be grouped into one part of a single FPGA. Waveform switching often means not only changing functionality, but also changing the FPGA clock frequency. However, that is beyond the current functionality of PR processes as the clock components (such as Digital Clock Managers (DCMs)) are excluded from the process of partial reconfiguration. In this paper, we present a novel architecture that combines another reconfigurable technology, Dynamic Reconfigurable Port (DRP), with PR based on a single FPGA in order to dynamically change both functionality and also the clock frequency. The architecture is demonstrated to reduce hardware utilization significantly compared with standard, static FPGA design
System software for the finite element machine
The Finite Element Machine is an experimental parallel computer developed at Langley Research Center to investigate the application of concurrent processing to structural engineering analysis. This report describes system-level software which has been developed to facilitate use of the machine by applications researchers. The overall software design is outlined, and several important parallel processing issues are discussed in detail, including processor management, communication, synchronization, and input/output. Based on experience using the system, the hardware architecture and software design are critiqued, and areas for further work are suggested
A visual programming environment for the Navier-Stokes computer
The Navier-Stokes computer is a high-performance, reconfigurable, pipelined machine designed to solve large computational fluid dynamics problems. Due to the complexity of the architecture, development of effective, high-level language compilers for the system appears to be a very difficult task. Consequently, a visual programming methodology has been developed which allows users to program the system at an architectural level by constructing diagrams of the pipeline configuration. These schematic program representations can then be checked for validity and automatically translated into machine code. The visual environment is illustrated by using a prototype graphical editor to program an example problem
Sessile droplet evaporation on superheated superhydrophobic surfaces
This fluid dynamics video depicts the evaporation of sessile water droplets
placed on heated superhydrophobic (SH) surfaces of varying cavity fraction,
F_c, and surface temperature, T_s, above the saturation temperature, T_sat.
Images were captured at 10,000 FPS and are played back at 30 FPS in this video.
Teflon-coated silicon surfaces of F_c = 0, 0.5, 0.8, and 0.95 were used for
these experiments. T_s ranging from 110{\deg}C to 210{\deg}C were studied. The
video clips show how the boiling behavior of sessile droplets is altered with
changes in surface microstructure. Quantitative results from heat transfer rate
experiments conducted by the authors are briefly discussed near the end of the
video.Comment: videos include
REINSTATEMENT OF EMPLOYEES UNDER THE FAIR LABOR STANDARDS ACT
The Fair Labor Standards Act is one of several comprehensive federal enactments regulating the relationship between employers and their employees in interstate commerce. These enactments have not followed a common pattern, nor have the means provided for their effective administration and enforcement been the same in each instance. Taken together, however, they establish our national labor policy. The underlying theory of this policy is that employees do not stand upon an equal footing with organized management and are unable to exert, individually, sufficient bargaining power to prevent management from imposing upon them conditions of employment detrimental to their welfare and inimical to the public interest; and, therefore, that it is the function of government to redress this inequality by imposing certain minimum standards of conduct. Generally speaking, the effect of these standards is to restrict the employer\u27s freedom of action and guarantee to the employees certain fundamental rights
JURISDICTION OF EMPLOYEE SUITS UNDER THE FAIR LABOR STANDARDS ACT
The statutory authority for employee suits under the Fair Labor Standards Act of 1938 is found in section 16(b). Suits under this section have been instituted in both state and federal courts. In practically every case the defendant has, by a motion to dismiss, challenged the jurisdiction of the court. The usual ground for the challenge in the state courts is that such suits seek to recover penalties incurred under a statute of the United States, and are, therefore, within the exclusive jurisdiction of the district courts of the United States. The jurisdiction of the federal district courts is generally challenged because of a lack of diversity of citizenship between the parties or because the plaintiff seeks recovery of a sum less than $3,000
A dc-to-pulse-width converter
Operation, design, and linearity of dc-to-pulse width converter for analog-to-digital converter application
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