Efficient Near-Infrared-Transparent Perovskite Solar Cells Enabling Direct Comparison of 4-Terminal and Monolithic Perovskite/Silicon Tandem Cells

Combining market-proven silicon solar cell technology with an efficient wide band gap top cell into a tandem device is an attractive approach to reduce the cost of photovoltaic systems. For this, perovskite solar cells are promising high-efficiency top cell candidates, but their typical device size (<0.2 cm2), is still far from standard industrial sizes. We present a1cm2 near-infrared transparent perovskite solar cell with 14.5% steady- state efficiency, as compared to 16.4% on 0.25 cm2. By mechanically stacking these cells with silicon heterojunction cells, we experimentally demonstrate a 4-terminal tandem measurement with a steady-state efficiency of 25.2%, with a 0.25 cm2 top cell. The developed top cell processing methods enable the fabrication of a 20.5% efficient and 1.43 cm2 large monolithic perovskite/silicon heterojunction tandem solar cell, featuring a rear-side textured bottom cell to increase its near-infrared spectral response. Finally, we compare both tandem configurations to identify efficiency-limiting factors and discuss the potential for further performance improvement

Optimization of front SiNx/ITO stacks for high-efficiency two-side contacted c-Si solar cells with co-annealed front and rear passivating contacts

In this contribution, we present an electron selective passivating contact metallised with a low temperature process to target front side applications in crystalline silicon (c-Si) solar cells. In addition to an interfacial silicon oxide (SiOx) and an in-situ phosphorous doped micro-crystalline silicon (μc-Si(n)) layer, it comprises an ultra-thin indium tin oxide (ITO) layer of 15 nm for lateral conductivity and a hydrogen rich silicon nitride (SiNx:H) layer which serves as hydrogen (H) reservoir and as anti-reflection coating. We use one single thermal treatment for 30 min at 350 °C to sinter the screen-printed paste, to recover sputtering damage induced during ITO deposition, and to diffuse hydrogen from the SiNx:H layer towards the c-Si/SiOx interface where it passivates interfacial defects. Applied to symmetrically processed textured samples, we find implied open-circuit voltage (iVOC) > 728 mV for optimal ITO thickness of 15 nm and annealing temperatures of 350 °C. The developed stack was applied on the front textured side of co-annealed (800 °C) p-type c-Si solar cells in combination with a tunnel oxide hole selective passivating contact on the rear side. We demonstrate solar cells with fill factor (FF) up to 81.9% and an open-circuit voltage (VOC) up to 719 mV. With a short-circuit current density (JSC) of 38.6 mA/cm2, we obtain a final cell efficiency to 22.8%. We find that the annealing of the SiNx:H/ITO stack strongly increases the ITO free carrier density penalizing the solar cell spectral response at high wavelengths

Passivating electron contact based on highly crystalline nanostructured silicon oxide layers for silicon solar cells

We present a novel passivating contact structure based on a nanostructured silicon-based layer. Traditional poly-Si junctions feature excellent junction characteristics but their optical absorption induces current losses when applied to the solar cell front side. Targeting enhanced transparency, the poly-Si layer is replaced with a mixed-phase silicon oxide/silicon layer. This mixed-phase layer consists of an amorphous SiOx matrix with incorporated Si filaments connecting one side of the layer to the other, and is referred to as nanocrystalline silicon oxide (nc-SiOx) layer. We investigate passivation quality, measured as saturation current density, and nanostructural changes, characterized by Raman spectroscopy and transmission electron microscopy, carefully studying the influence of annealing dwell temperature. Excellent surface passivation on n-type and also p-type wafers is shown. An optimum annealing temperature of 950 °C is found, resulting in a saturation current density of 8.8 fA cm2 and 11.0 fA cm2 for n-type and p-type wafers, respectively. Even before forming gas annealing, emitter saturation current densities of 27.9 fA cm2 (n+/n junction) and 32.0 fA cm2 (n+/p junction) are reached. Efficient current extraction is presented with specific contact resistivities of 86 mΩ cm2 on n-type wafer and 19 mΩ cm2 on p-type wafers, respectively. High-resolution transmission electron microscopy reveals that the layer stack consists of intermixed SiOx and Si phases with the Si phases being partly crystalline already in the as-deposited state. Thermal annealing at temperatures > 850 °C further promotes crystallization of the Si-rich regions. The addition of the SiOx phase enhances the thermal stability of the contact and should allow to tune the refractive index and improve transparency, while still providing efficient electrical transport through the crystalline Si phase, which extends throughout almost the entire contact

Silicon-Rich Silicon Carbide Hole-Selective Rear Contacts for Crystalline-Silicon-Based Solar Cells

The use of passivating contacts compatible with typical homojunction thermal processes is one of the most promising approaches to realizing high-efficiency silicon solar cells. In this work, we investigate an alternative rear-passivating contact targeting facile implementation to industrial p-type solar cells. The contact structure consists of a chemically grown thin silicon oxide layer, which is capped with a boron-doped silicon-rich silicon carbide [SiCx(p)] layer and then annealed at 800–900 °C. Transmission electron microscopy reveals that the thin chemical oxide layer disappears upon thermal annealing up to 900 °C, leading to degraded surface passivation. We interpret this in terms of a chemical reaction between carbon atoms in the SiCx(p) layer and the adjacent chemical oxide layer. To prevent this reaction, an intrinsic silicon interlayer was introduced between the chemical oxide and the SiCx(p) layer. We show that this intrinsic silicon interlayer is beneficial for surface passivation. Optimized passivation is obtained with a 10-nm-thick intrinsic silicon interlayer, yielding an emitter saturation current density of 17 fA cm–2 on p-type wafers, which translates into an implied open-circuit voltage of 708 mV. The potential of the developed contact at the rear side is further investigated by realizing a proof-of-concept hybrid solar cell, featuring a heterojunction front-side contact made of intrinsic amorphous silicon and phosphorus-doped amorphous silicon. Even though the presented cells are limited by front-side reflection and front-side parasitic absorption, the obtained cell with a Voc of 694.7 mV, a FF of 79.1%, and an efficiency of 20.44% demonstrates the potential of the p+/p-wafer full-side-passivated rear-side scheme shown here