First-Principles Study of Point Defects in LaAlO₃

In this study, the native point defects including oxygen vacancy and interstitial, metal (La, Al) vacancy and interstitial, and metal antisite in perovskite LAO are studied. Defect formation energies are studied as a function of the external chemical potentials and Fermi level. The stable defects are identified under different external chemical potentials and Fermi levels. The effect of image charge corrections is also investigated. Finally, based on results in this study, optimal growth conditions can be proposed to achieve better defect engineering for LAO gate dielectrics.Singapore-MIT Alliance (SMA

Reliability of Multi-Terminal Copper Dual-Damascene Interconnect Trees

Electromigration tests on different Cu dual-damascene interconnect tree structures consisting of various numbers of straight via-to-via lines connected at the common middle terminal have been carried out. Like Al-based interconnects, the reliability of a segment in a Cu-based interconnect tree strongly depends on the stress conditions of connected segments. The analytic model based on a nodal analysis developed for Al trees gives a conservative estimate of the lifetime of Cu-based interconnect trees. However, there are important differences in the results obtained under similar test conditions for Al-based and Cu-based interconnect trees. These differences are attributed to the variations in the architectural schemes of the two metallization systems. The absence of a conducting electromigration-resistant overlayer in Cu technology and the low critical stress for void nucleation at the Cu/inter-level diffusion barrier (i.e. Si₃N₄) interface leads to different failure modes between Cu and Al interconnects. As a result, the most highly stressed segment in a Cu-based interconnect tree is not always the least reliable. Moreover, the possibility of liner rupture at stressed dual-damascene vias leads to significant differences in tree reliabilities in Cu compared to Al. While an interconnect tree can be treated as a fundamental unit whose reliability is independent of that of other units in Al-based interconnect architectures, interconnect trees can not be treated as fundamental units for circuit-level reliability analyses for Cu-based interconnects.Singapore-MIT Alliance (SMA

Native Point Defects in yttria as a High-Dielectric-Constant Gate Oxide Material: A First-Principles Study

Yttria (Y₂O₃) has become a promising gate oxide material to replace silicon dioxide in metal-oxide-semiconductor (MOS) devices. The characterization of native point defect in Y₂O₃ is essential to understand the behavior of the material. We used the first-principles pseudopotential method to study the electronic structure, defect structure and formation energy of native point defects in Y₂O₃. Vacancies, interstitials and antisites in their relevant charge states are considered. The dominant defect types are identified under different chemical potentials and different Fermi levels. Oxygen vacancies are the dominant defect types under high yttrium chemical potential condition. Lower yttrium chemical potential leads to oxygen interstitials and ultimately yttrium vacancies when Y₂O₃ is used as a high dielectric constant gate oxide material in MOS devices.Singapore-MIT Alliance (SMA

Oblique Angle Deposition of Germanium Film on Silicon Substrate

The effect of flux angle, substrate temperature and deposition rate on obliquely deposited germanium (Ge) films has been investigated. By carrying out deposition with the vapor flux inclined at 87° to the substrate normal at substrate temperatures of 250°C or 300°C, it may be possible to obtain isolated Ge nanowires. The Ge nanowires are crystalline as shown by Raman Spectroscopy.Singapore-MIT Alliance (SMA

Study of Stress Evolution of Germanium Nanocrystals Embedded in Silicon Oxide Matrix

Germanium (Ge) nanocrystals had been synthesized by annealing co-sputtered SiO₂-Ge in N₂ and/or forming gas (90% N₂ + 10% H₂) at temperatures ranging from 700 to 1000°C from 15 to 60 min. It was concluded that the annealing ambient, temperature and time have a significant influence on the formation and evolution of the nanocrystals. We also showed that a careful selective etching of the annealed samples in hydrofluoric solution enabled the embedded Ge nanocrystals to be liberated from the Si oxide matrix. From the Raman results of the as-grown and the liberated nanocrystals, we established that the nanocrystals generally experienced compressive stress in the oxide matrix and the evolution of these stress states was intimately linked to the distribution, density, size and quality of the Ge nanocrystals.Singapore-MIT Alliance (SMA

Workfunction Tuning of n-Channel MOSFETs Using Interfacial Yttrium Layer in Fully Silicided Nickel Gate

Continual scaling of the CMOS technology requires thinner gate dielectric to maintain high performance. However, when moving into the sub-45 nm CMOS generation, the traditional poly-Si gate approach cannot effectively reduce the gate thickness further due to the poly-depletion effect. Fully silicided Ni metal gate (FUSI) has been proven to be a promising solution. Ni FUSI metal gate can significantly reduce gate-line sheet resistance, eliminate boron penetration to channels and has good process compatibility with high-k gate dielectric. But Ni FUSI has a mid-gap workfunction which is not suitable for high-performance CMOS applications where the band-edge workfunction is required. In this paper, we propose to tune the nickel (Ni) fully silicided metal gate (FUSI) workfunction via an yttrium/Si/Ni gate stack structure. The workfunction of such structure indicates that the Y interlayer can effectively tune the Ni FUSI workfunction from the mid gap to the conduction band edge of silicon by controlling the interlayer thickness. The gate stack workfunction starts to saturate to the pure yttrium value when the yttrium interlayer is >1.6 nm. This indicates the chemical potential of the material adjacent to gate electrode/gate insulator plays an important role in the determination of the workfunction.Singapore-MIT Alliance (SMA

Charge storage in nanocrystal systems: Role of defects?

Wet thermal oxidations of polycrystalline Si₀.₅₄Ge₀.₄₆ films at 600°C for 30 and 50 min were carried out. A stable mixed oxide was obtained for films that were oxidized for 50 min. For film oxidized for 30 min, however, a mixed oxide with Ge nanocrystallites embedded in the oxide matrix was obtained. A trilayer gate stack structure that consisted of tunnel oxide/oxidized polycrystalline Si₀.₅₄Ge₀.₄₆/rf sputtered SiO₂ layers was fabricated. We found that with a 30 min oxidized middle layer, annealing the structure in N₂ ambient results in the formation of germanium nanocrystals and the annealed structure exhibits memory effect. For a trilayer structure with middle layer oxidized for 50 min, annealing in N₂ showed no nanocrystal formation and also no memory effect. Annealing the structures with 30 or 50 min oxidized middle layer in forming gas ambient resulted in nanocrystals embedded in the oxide matrix but no memory effect. This suggests that the charge storage mechanism for the trilayer structure is closely related to the interfacial traps of the nanocrystals.Singapore-MIT Alliance (SMA

Mortality Dependence of Cu Dual Damascene Interconnects on Adjacent Segments

Electromigration experiments have been carried out on straight interconnects that have single vias at each end, and are divided into two segments by a via in the center ("dotted-I" structures). For dotted-i structures in the second metal layer (M2) and with 25µm-long segments length, failures occurred even when the product of the current density and segment length (jL) was as low as 1250A/cm, even though via terminated 25µm-long lines are "immortal" when (jL)cr < 1500 A/cm. Moreover, we found the mortalities of the dotted-I segments to be dependent on the current density and current direction in the adjacent segment. These result suggest that there is not a definite value of jL product that defines true immortality in individual segments that are part of an interconnect tree, and that the critical value of jL for Cu dual damascene segments is dependent on the magnitude and direction of current flow in adjacent segments. Therefore, (jL)cr values determined in two-terminal via-terminated lines cannot be directly applied to interconnects with branched segments, but rather the magnitude as well as the direction of the current flow in the adjoining segments must be taken into consideration in determining the immortality of interconnect segments.Singapore-MIT Alliance (SMA

Effects of Platinum on NiPtSiGe/n-SiGe and NiPtSi/n-Si Schottky Contacts

Solid phase reaction of NiPt/Si and NiPt/SiGe is one of the key issues for silicide (germanosilicide) technology. Especially, the NiPtSiGe, in which four elements are involved, is a very complex system. As a result, a detailed study is necessary for the interfacial reaction between NiPt alloy film and SiGe substrate. Besides using traditional material characterization techniques, characterization of Schottky diode is a good measure to detect the interface imperfections or defects, which are not easy to be found on large area blanket samples. The I-V characteristics of 10nm Ni(Pt=0, 5, 10 at.%) germanosilicides/n-Si₀/₇Ge₀.₃ and silicides/n-Si contact annealed at 400 and 500°C were studied. For Schottky contact on n-Si, with the addition of Pt in the Ni(Pt) alloy, the Schottky barrier height (SBH) increases greatly. With the inclusion of a 10% Pt, SBH increases ~0.13 eV. However, for the Schottky contacts on SiGe, with the addition of 10% Pt, the increase of SBH is only ~0.04eV. This is explained by pinning of the Fermi level. The forward I-V characteristics of 10nm Ni(Pt=0, 5, 10 at.%)SiGe/SiGe contacts annealed at 400°C were investigated in the temperature range from 93 to 300K. At higher temperature (>253K) and larger bias at low temperature (<253K), the I-V curves can be well explained by a thermionic emission model. At lower temperature, excess currents at lower forward bias region occur, which can be explained by recombination/generation or patches due to inhomogenity of SBH with pinch-off model or a combination of the above mechanisms.Singapore-MIT Alliance (SMA

The Influence of Adjacent Segment on the Reliability of Cu Dual Damascene Interconnects

Three terminal âdotted-I’ interconnect structures, with vias at both ends and an additional via in the middle, were tested under various test conditions. Mortalities (failures) were found in right segments with jL value as low as 1250 A/cm, and the mortality of a dotted-I segment is dependent on the direction and magnitude of the current in the adjacent segment. Some mortalities were also found in the right segments under a test condition where no failure was expected. Cu extrusion along the delaminated Cu/Si₃N₄ interface near the central via region was believed to cause the unexpected failures. From the time-to-failure (TTF), it is possible to quantify the Cu/Si₃N₄ interfacial strength and bonding energy. Hence, the demonstrated test methodology can be used to investigate the integrity of the Cu dual damascene processes. As conventionally determined critical jL values in two-terminal via-terminated lines cannot be directly applied to interconnects with branched segments, this also serves as a good methodology to identify the critical effective jL values for immortality.Singapore-MIT Alliance (SMA