Performance Characterization of Multi-threaded Graph Processing Applications on Intel Many-Integrated-Core Architecture

Intel Xeon Phi many-integrated-core (MIC) architectures usher in a new era of terascale integration. Among emerging killer applications, parallel graph processing has been a critical technique to analyze connected data. In this paper, we empirically evaluate various computing platforms including an Intel Xeon E5 CPU, a Nvidia Geforce GTX1070 GPU and an Xeon Phi 7210 processor codenamed Knights Landing (KNL) in the domain of parallel graph processing. We show that the KNL gains encouraging performance when processing graphs, so that it can become a promising solution to accelerating multi-threaded graph applications. We further characterize the impact of KNL architectural enhancements on the performance of a state-of-the art graph framework.We have four key observations: 1 Different graph applications require distinctive numbers of threads to reach the peak performance. For the same application, various datasets need even different numbers of threads to achieve the best performance. 2 Only a few graph applications benefit from the high bandwidth MCDRAM, while others favor the low latency DDR4 DRAM. 3 Vector processing units executing AVX512 SIMD instructions on KNLs are underutilized when running the state-of-the-art graph framework. 4 The sub-NUMA cache clustering mode offering the lowest local memory access latency hurts the performance of graph benchmarks that are lack of NUMA awareness. At last, We suggest future works including system auto-tuning tools and graph framework optimizations to fully exploit the potential of KNL for parallel graph processing.Comment: published as L. Jiang, L. Chen and J. Qiu, "Performance Characterization of Multi-threaded Graph Processing Applications on Many-Integrated-Core Architecture," 2018 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Belfast, United Kingdom, 2018, pp. 199-20

SubGraph2Vec: Highly-Vectorized Tree-likeSubgraph Counting

Subgraph counting aims to count occurrences of a template T in a given network G(V, E). It is a powerful graph analysis tool and has found real-world applications in diverse domains. Scaling subgraph counting problems is known to be memory bounded and computationally challenging with exponential complexity. Although scalable parallel algorithms are known for several graph problems such as Triangle Counting and PageRank, this is not common for counting complex subgraphs. Here we address this challenge and study connected acyclic graphs or trees. We propose a novel vectorized subgraph counting algorithm, named Subgraph2Vec, as well as both shared memory and distributed implementations: 1) reducing algorithmic complexity by minimizing neighbor traversal; 2) achieving a highly-vectorized implementation upon linear algebra kernels to significantly improve performance and hardware utilization. 3) Subgraph2Vec improves the overall performance over the state-of-the-art work by orders of magnitude and up to 660x on a single node. 4) Subgraph2Vec in distributed mode can scale up the template size to 20 and maintain good strong scalability. 5) enabling portability to both CPU and GPU.Comment: arXiv admin note: text overlap with arXiv:1903.0439

Krylov iterative method with communication and energy efficiency optimization on heterogeneous clusters

Les méthodes de Krylov sont fréquemment utilisés dans des problèmes linéaires, comme de résoudre des systèmes linéaires ou de trouver des valeurs propres et vecteurs propres de matrices, avec une taille extrêmement grande. Comme ces méthodes itératives nécessitent un calcul intensif, ils sont normalement déployés sur des grands clusters avec les mémoires distribués et les données communiqués par MPI. Lorsque la taille du problème augmente, la communication devient un bouchon principale d'atteindre une haute scalabité à cause de deux raisons: 1) La plupart des méthodes itératives comptent sur BLAS-2 matrices-vecteurs opérations de bas niveau qui sont communication intensive. 2) Le mouvement de données (accès à la mémoire, la communication par MPI) est beaucoup plus lent que la fréquence du processeur. Dans le cas des opérations de matrice creuse tels que la multiplication de matrices creuses et vecteurs (SpMV), le temps de communication devient dominant par rapport au temps de calcul. En outre, l'avènement des accélérateurs et coprocesseurs comme le GPU de NVIDIA fait le coût du calcul moins cher, tandis que le coût de la communication reste élevé dans des systèmes hétérogènes. Ainsi, la première partie de nos travaux se concentre sur l'optimisation des coûts de communication pour des méthodes itératives sur des clusters hétérogènes. En dehors du coût de communication, le mur de la puissance et de l’énergie devient un autre bouchon de scalabité pour le futur calcul exascale. Les recherches indiquent que la mise en œuvre des implémentations d'algorithmes qui sont informées pourrait efficacement réduire la dissipation de puissance des clusters. Nous explorons également la mise en œuvre des méthodes et des implémentations qui économisent l'énergie dans notre expérimentation. Enfin, l'optimisation de la communication et la mise en œuvre de l'efficacité énergétique seraient intégrés dans un schéma de méthode GMRES, qui exige un cadre d'auto-tuning pour optimiser sa performance.Iterative methods are frequently used in extremely large scale linear problems, such solving linear systems or finding eigenvalue/eigenvectors of matrices. As these iterative methods require a substantial computational workload, they are normally deployed on large clusters of distributed memory architectures communicated via MPI. When the problem size scales up, the communication becomes a major bottleneck of reaching a higher scalability because of two reasons: 1) Many of the iterative methods rely on BLAS-2 low level matrix vector kernels that are communication intensive. 2) Data movement (memory access, MPI communication) is much slower than processor's speed. In case of sparse matrix operations such as Sparse Matrix Vector Multiplication (SpMV), the communication even replaces the computation as the dominant time cost. Furthermore, the advent of accelerators/coprocessors like Nvidia's GPU make computation cost more cheaper, while the communication cost remains high in such CPU-coprocessor heterogeneous systems. Thus, the first part of our work focus on the optimization of communication cost of iterative methods on heterogeneous clusters. Besides the communication cost, power wall becomes another bottleneck of future exascale computing in recent time. Researches indicate that a power-aware algorithmic implementation strategy could efficiently reduce the power dissipation of large clusters. We also explore the potential energy saving implementation of iterative methods in our experimentation. Finally, both the communication optimization and energy efficiency implementation would be integrated into a GMRES method, which demands an auto-tuning framework to maximize its performance

Energy Consumption Evaluation for Krylov Methods on Clusters of gPU Accelerators

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A TSQR Based Krylov Basis Computation Method on Hybrid GPU Clusters

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Energy Consumption Evaluation for Krylov Methods on Clusters of gPU Accelerators

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A TSQR Based Krylov Basis Computation Method on Hybrid GPU Clusters

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A communication Optimisation Scheme for Basic Computation of Krylov Subspace Methods on multi-GPUs

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