4 research outputs found
Charged Particle Tracking in Real-Time Using a Full-Mesh Data Delivery Architecture and Associative Memory Techniques
We present a flexible and scalable approach to address the challenges of
charged particle track reconstruction in real-time event filters (Level-1
triggers) in collider physics experiments. The method described here is based
on a full-mesh architecture for data distribution and relies on the Associative
Memory approach to implement a pattern recognition algorithm that quickly
identifies and organizes hits associated to trajectories of particles
originating from particle collisions. We describe a successful implementation
of a demonstration system composed of several innovative hardware and
algorithmic elements. The implementation of a full-size system relies on the
assumption that an Associative Memory device with the sufficient pattern
density becomes available in the future, either through a dedicated ASIC or a
modern FPGA. We demonstrate excellent performance in terms of track
reconstruction efficiency, purity, momentum resolution, and processing time
measured with data from a simulated LHC-like tracking detector
A flexible and low-cost open-source IPMC mezzanine for ATCA boards based on OpenIPMC
This work presents the development of an Intelligent Platform Management
Controller mezzanine in a Mini DIMM form factor for use in electronic boards
compliant to the PICMG Advanced Telecommunication Computing Architecture (ATCA)
standard. The module is based on an STMicroelectronics STM32H745
microcontroller running the OpenIPMC open-source software. The mezzanine has
been successfully tested on a variety of ATCA boards being proposed for the
upgrade of the experiments at the HL-LHC, with its design and firmware being
distributed under open-source hardware license.Comment: 6+1 page
A Full Mesh ATCA-based General Purpose Data Processing Board (Pulsar II)
The Pulsar II is a custom ATCA full mesh enabled FPGA-based processor board which has been designed with the goal of creating a scalable architecture abundant in flexible, non-blocking, high bandwidth interconnections. The design has been motivated by silicon-based tracking trigger needs for LHC experiments. In this technical memo we describe the Pulsar II hardware and its performance, such as the performance test results with full mesh backplanes from di↵erent vendors, how the backplane is used for the development of low-latency time-multiplexed data transfer schemes and how the inter-shelf and intra-shelf synchronization works
Charged Particle Tracking in Real-Time Using a Full-Mesh Data Delivery Architecture and Associative Memory Techniques
We present a flexible and scalable approach to address the challenges of charged particle track reconstruction in real-time event filters (Level-1 triggers) in collider physics experiments. The method described here is based on a full-mesh architecture for data distribution and relies on the Associative Memory approach to implement a pattern recognition algorithm that quickly identifies and organizes hits associated to trajectories of particles originating from particle collisions. We describe a successful implementation of a demonstration system composed of several innovative hardware and algorithmic elements. The implementation of a full-size system relies on the assumption that an Associative Memory device with the sufficient pattern density becomes available in the future, either through a dedicated ASIC or a modern FPGA. We demonstrate excellent performance in terms of track reconstruction efficiency, purity, momentum resolution, and processing time measured with data from a simulated LHC-like tracking detector