Scalable Emulation of Sign-Problem−-Free Hamiltonians with Room Temperature p-bits

The growing field of quantum computing is based on the concept of a q-bit which is a delicate superposition of 0 and 1, requiring cryogenic temperatures for its physical realization along with challenging coherent coupling techniques for entangling them. By contrast, a probabilistic bit or a p-bit is a robust classical entity that fluctuates between 0 and 1, and can be implemented at room temperature using present-day technology. Here, we show that a probabilistic coprocessor built out of room temperature p-bits can be used to accelerate simulations of a special class of quantum many-body systems that are sign-problem$-$free or stoquastic, leveraging the well-known Suzuki-Trotter decomposition that maps a $d$-dimensional quantum many body Hamiltonian to a $d$+1-dimensional classical Hamiltonian. This mapping allows an efficient emulation of a quantum system by classical computers and is commonly used in software to perform Quantum Monte Carlo (QMC) algorithms. By contrast, we show that a compact, embedded MTJ-based coprocessor can serve as a highly efficient hardware-accelerator for such QMC algorithms providing several orders of magnitude improvement in speed compared to optimized CPU implementations. Using realistic device-level SPICE simulations we demonstrate that the correct quantum correlations can be obtained using a classical p-circuit built with existing technology and operating at room temperature. The proposed coprocessor can serve as a tool to study stoquastic quantum many-body systems, overcoming challenges associated with physical quantum annealers.Comment: Fixed minor typos and expanded Appendi

Machine Learning Quantum Systems with Magnetic p-bits

The slowing down of Moore's Law has led to a crisis as the computing workloads of Artificial Intelligence (AI) algorithms continue skyrocketing. There is an urgent need for scalable and energy-efficient hardware catering to the unique requirements of AI algorithms and applications. In this environment, probabilistic computing with p-bits emerged as a scalable, domain-specific, and energy-efficient computing paradigm, particularly useful for probabilistic applications and algorithms. In particular, spintronic devices such as stochastic magnetic tunnel junctions (sMTJ) show great promise in designing integrated p-computers. Here, we examine how a scalable probabilistic computer with such magnetic p-bits can be useful for an emerging field combining machine learning and quantum physics

Accelerated Quantum Monte Carlo with Probabilistic Computers

Quantum Monte Carlo (QMC) techniques are widely used in a variety of scientific problems and much work has been dedicated to developing optimized algorithms that can accelerate QMC on standard processors (CPU). With the advent of various special purpose devices and domain specific hardware, it has become increasingly important to establish clear benchmarks of what improvements these technologies offer compared to existing technologies. In this paper, we demonstrate 2 to 3 orders of magnitude acceleration of a standard QMC algorithm using a specially designed digital processor, and a further 2 to 3 orders of magnitude by mapping it to a clockless analog processor. Our demonstration provides a roadmap for 5 to 6 orders of magnitude acceleration for a transverse field Ising model (TFIM) and could possibly be extended to other QMC models as well. The clockless analog hardware can be viewed as the classical counterpart of the quantum annealer and provides performance within a factor of $<10$ of the latter. The convergence time for the clockless analog hardware scales with the number of qubits as $\sim N$, improving the $\sim N^2$ scaling for CPU implementations, but appears worse than that reported for quantum annealers by D-Wave

Emulating Quantum Interference with Generalized Ising Machines

The recent groundbreaking demonstration of quantum supremacy in the noisy intermediate scale quantum (NISQ) era has led to an intense activity in establishing finer boundaries between classical and quantum computing. In this paper, we use quantum Monte Carlo (QMC) techniques to formulate a systematic procedure for translating any sequence of $d$ quantum gates acting on $n$ q-bits into a Boltzmann machine (BM) having $n+g(d)$ classical spins or p-bits with two values "0" and "1", but with a complex energy function $E$. Using this procedure we emulate Shor's algorithm with up to $36$ q-bits using $90$ p-bits, on an ordinary laptop computer in less than a day, while a naive Schr\"{o}dinger implementation would require multiplying matrices with $\approx 10^{21}$ elements. Even larger problems should be accessible on dedicated Ising Machines. However, we also identify clear limitations of the probabilistic approach by introducing a quantitative metric $S_{\text{Total}}$ for its inefficiency relative to a quantum computer. For example, a straightforward probabilistic implementation of Shor's algorithm with $n$ q-bits leads to an $S_{\text{Total}} \sim \exp{(-n/2)}$, making the computation time for the probabilistic Shor's algorithm scale exponentially as $2^{n/2}$ instead of the polynomial scaling expected for true quantum computers. This is a manifestation of the well-known sign problem in QMC and it may be possible to "tame" it with appropriate transformations. Finally, we present an example featuring a standard optimization algorithm based on a purely real energy function to which we add an imaginary part $\Im{(E)}$, thereby augmenting the statistical suppression of Feynman paths with quantum-like phase cancellation. This example illustrates how the sign problem encountered in classical annealers can potentially be turned into a computational resource for quantum annealers