61 research outputs found

    Influence of AC signal oscillator level on effective mobility measurement by split C–V technique in MOSFETs

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    International audienceThe impact of the AC signal oscillator level on the effective mobility measurement by split C-V technique in MOSFETs is investigated. It is found that, due to strong nonlinearity below threshold, the gate-to-channel capacitance and, by turn, the channel inversion charge increases linearly with the oscillator level. As a consequence, the extracted effective mobility decreases linearly with the oscillator level, resulting in a huge underestimation of the effective mobility in weak inversion. A physical model explaining these behaviours is developed, which enables to obtain a quantitative description of both inversion charge and effective mobility variations with the oscillator level and the gate voltage.he impact of the AC signal oscillator level on the effective mobility measurement by split C-V technique in MOSFETs is investigated. It is found that, due to strong nonlinearity below threshold, the gate-to-channel capacitance and, by turn, the channel inversion charge increases linearly with the oscillator level. As a consequence, the extracted effective mobility decreases linearly with the oscillator level, resulting in a huge underestimation of the effective mobility in weak inversion. A physical model explaining these behaviours is developed, which enables to obtain a quantitative description of both inversion charge and effective mobility variations with the oscillator level and the gate voltage

    Impact of low-frequency noise variability on statistical parameter extraction in ultra-scaled CMOS devices

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    International audienceThe impact on the extracted low-frequency noise (LFN) parameter values due to LFN variability in CMOS devices is investigated. First, it is demonstrated that the noise level dispersion follows a log normal statistical distribution. Then, based on this feature, it is explained why the mean values from the linear data are different from the mean values (or median values) calculated from the log noise data. Finally, the consequence of this finding in terms of LFN characterisation issues and Monte Carlo LFN variability circuit simulation is discussed

    Semi-analytical modelling of short channel effects in Si Double-Gate, Tri-Gate and Gate-All-Around MOSFETs

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    Leakage current conduction in metal gate junctionless nanowire transistors

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    International audienceIn this paper, the experimental off-state drain leakage current behavior is systematically explored in n- and p-channel junctionless nanowire transistors with HfSiON/TiN/p+-polysilicon gate stack. The analysis of the drain leakage current is based on experimental data of the gate leakage current. It has been shown that the off-state drain leakage current in n-channel devices is negligible, whereas in p-channel devices it is significant and dramatically increases with drain voltage. The overall results indicate that the off-state drain leakage current in p-channel devices is mainly due to trap-assisted Fowler-Nordheim tunneling of electrons through the gate oxide of electrons from the metal gate to the silicon layer near the drain region
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