Optical processing for semiconductor device fabrication

A new technique for semiconductor device processing is described that uses optical energy to produce local heating/melting in the vicinity of a preselected interface of the device. This process, called optical processing, invokes assistance of photons to enhance interface reactions such as diffusion and melting, as compared to the use of thermal heating alone. Optical processing is performed in a 'cold wall' furnace, and requires considerably lower energies than furnace or rapid thermal annealing. This technique can produce some device structures with unique properties that cannot be produced by conventional thermal processing. Some applications of optical processing involving semiconductor-metal interfaces are described

Seventh Workshop on The Role of Impurities and Defects in Silicon Device Processing

The Seventh Workshop on the Role of Impurities and Defects in Silicon Device Processing, held August 11-13, 1997, in Vail, Colorado, was a great success. The workshop theme, `R{ampersand}D Issues for Crystalline Silicon to Support GW/yr Goal by the Year 2010,` provided a focus that proved both timely and stimulating. The workshop attracted 76 attendees from six countries, who participated in lively discussions of the issues. This is an upbeat time for the photovoltaic industry as sales passed 100 megawatts per year. The workshop revealed that worldwide R{ampersand}D in silicon PV is stronger than ever. The new thin-Si technologies are developing remarkably fast since the resurgence in their interest about 10 years ago. A number of groups around the world are reporting cell results with efficiencies above 9% from polycrystalline cells deposited on low-cost substrates. Conventional wafer and ribbon Si manufacturing costs continue to come down as new capacity is added. Detailed studies on manufacturing costs convincingly show, for the first time, that module manufacturing costs in the range of $0.70 to$1.90 per watt are achievable with manufacturing volumes per facility in the range of 100 to 500 megawatts per year. Such cost reduction will improve profitability and allow expansion into ever-larger markets. This encouraging prognosis for future technology, when coupled with the current climate of 20% market growth despite stable, or even increasing, module prices, signals the eminent emergence of PV as a vital, global industry. Exciting times indeed; one gigawatt per year is not so far away

Surface characteristics and damage distributions of diamond wire sawn wafers for silicon solar cells

This paper describes surface characteristics, in terms of its morphology, roughness and near-surface damage of Si wafers cut by diamond wire sawing (DWS) of Si ingots under different cutting conditions. Diamond wire sawn Si wafers exhibit nearly-periodic surface features of different spatial wavelengths, which correspond to kinematics of various movements during wafering, such as ingot feed, wire reciprocation, and wire snap. The surface damage occurs in the form of frozen-in dislocations, phase changes, and microcracks. The in-depth damage was determined by conventional methods such as TEM, SEM and angle-polishing/defect-etching. However, because these methods only provide local information, we have also applied a new technique that determines average damage depth over a large area. This technique uses sequential measurement of the minority carrier lifetime after etching thin layers from the surfaces. The lateral spatial damage variations, which seem to be mainly related to wire reciprocation process, were observed by photoluminescence and minority carrier lifetime mapping. Our results show a strong correlation of damage depth on the diamond grit size and wire usage