Improved silicon quantum dots single electron transfer operation with hydrogen silsesquioxane resist technology

Hydrogen silsesquioxane (HSQ) is a high resolution electron beam resist that offers a high etch resistance and small line edge roughness. In our previous work, we showed that by using this resist we can fabricate very high density double quantum dot (QD) single electron transistors on silicon-on-insulator (SOI) substrates for applications in quantum information processing. We observed that 80% of 144 fabricated devices had dimensional variations of ±5 nm with a standard deviation of 3.4 nm. Here, we report on the functionality of our Si QD devices through electrical measurements and further HSQ process optimisations, which improve the effective side gates control on single electron operation

Development of novel fabrication technology for SOI single electron transfer devices

This report presents the design, simulation and fabrication of a spin qubit platform on ultrathin SOI(Silicon-on-Insulator) using A1 FinSET (Single electron transistor) gates and Si side gates. A new design layout is proposed for the double spin qubits co-integrated with a single electron electrometer, a waveguide and a nanomagnet. This platform aims to demonstrate the full operation of double spin qubits by integrating the following three key techniques in one compact footprint: a precisely controlled single electron transfer technology, a high speed charge detection technique and a single spin detection technology based on spin to charge conversion. A single electron transfer device (SETD) integrated with an electrometer is introduced here as the main building block of the spin qubit platform. The single electron transfer device consists of three nanowire (MOSETs connected in series, and is capacitively coupled to an SET electrometer. A unique layout design for the SETD and a novel single electron transfer voltage pulse sequence are introduced. Simulation and dynamic analysis of this device operation are preformed using a finite element capacitance based simulation method and a Monte Carlo based single electron circuit simulation. The simulations demonstrated the ability of this platform to transfer single electrons and these characteristics are analyzed to optimize the layout. A novel fabrication process to realize high density silicon quantum dots (QDs) with A1 FinSET gates and close proximity Si gates on ultrathin SOI, for single electron transfer and detection, is successfully established with a number of different device layouts realized. In these devices, A1 FinSET gates surround an SOI nanowire channel forming electrically tunable potential barriers and defining QDs among them; Si plunger side gates are included to enable precise control of the QDs potential. Five SETD and electrometer device generations have been realized, tested and analyzed to improve the device yield; this extensive process development work is concluded with a novel fabrication approach to demonstrate successful FinSET A1 gae technology for SOI nanowires. This QDs platform is fabricated using a multi-layer electron beam lithography process that is fully compatible with metal oxide semiconductor technology. The fabrication process is fully developed with a yield of 92% and a great flexibility to enable the realization of more complex structures and even for devices beyond the scope of this project as shown in the appendices of this report

Realization of Al FinFET single electron turnstile co-integrated with a close proximity electrometer SET

In the past few years, spin qubits in Si quantum dots (QDs) have demonstrated great potential to fulfill the Loss DiVincenzo quantum computing criteria [1]. Although good controllability of single electron spins has been demonstrated for QDs defined on the two-dimensional electron gas (2DEG) formed at the GaAs/AlGaAs heterojunction by using top-down lithography [2], the coherence of electron spins deteriorates rapidly in GaAs due to rich nuclear spins in GaAs. Electron spins confined in silicon based QDs are expected to have longer coherence time thanks to the low nuclear spin density of silicon based materials, with coherence times as long as 6 seconds recently been demonstrated [3]. This has further asserted the advantage of using Si as a platform to realize spin qubits and several Si QD structures have been investigated in silicon on insulator (SOI) [4], [5] and Si (2DEG) [6]. In previous work, we have presented the design and simulation of a novel SOI-based spin qubit platform using Al FinFET gates and Si side gates. The simulations demonstrated the ability of this platform to transfer, confine and detect single electrons [7], [8]. In this letter, we report a novel fabrication process to realize high density silicon based QDs with close proximity Al and Si gates on ultrathin SOI for spin qubit applications

Sheet Resistance Measurements of Conductive Thin Films: A Comparison of Techniques

Conductive thin films are an essential component of many electronic devices. Measuring their conductivity accurately is necessary for quality control and process monitoring. We compare conductivity measurements on films for flexible electronics using three different techniques: four-point probe, microwave resonator and terahertz time-domain spectroscopy. Multiple samples were examined, facilitating the comparison of the three techniques. Sheet resistance values at DC, microwave and terahertz frequencies were obtained and were found to be in close agreement

Atomic scale surface modification of TiO2 3D nano-arrays : plasma enhanced atomic layer deposition of NiO for photocatalysis

Here we report the development of a new scalable and transferable plasma assisted atomic layer deposition (PEALD) process for the production of uniform, conformal and pinhole free NiO with sub-nanometre control on a commercial ALD reactor. In this work we use the readily available nickel precursor nickelocene in conjunction with O2 plasma as a co-reagent (100 W) over a temperature range of 75–325 °C. An optimised growth per cycle of 0.036 nm was obtained at 250 °C with uniform thickness and coverage on scale-up to and including an 6 inch Si wafer (with a 200 nm thermal SiO2 top layer). The bulk characteristics of the NiO thin films were comprehensively interrogated by PXRD, Raman spectroscopy, UV-vis spectroscopy and XPS. The new NiO process was subsequently used to fabricate a 3D nanostructured NiO/TiO2/FTO heterojunction by depositing 20 nm of NiO onto pre-fashioned TiO2 nanorods at 250 °C for application in the photo-electrolysis of water in a photoelectrochemical cell (PEC). The NiO/TiO2 3D array was shown to possess a peak current of 0.38 mA cm−2 at 1.23 VRHE when stimulated with a one sun lamp.peerReviewe

100 GHz zinc oxide Schottky diodes processed from solution on a wafer scale

Inexpensive radio-frequency devices that can meet the ultrahigh-frequency needs of fifth- and sixth-generation wireless telecommunication networks are required. However, combining high performance with cost-effective scalable manufacturing has proved challenging. Here, we report the fabrication of solution-processed zinc oxide Schottky diodes that can operate in microwave and millimetre-wave frequency bands. The fully coplanar diodes are prepared using wafer-scale adhesion lithography to pattern two asymmetric metal electrodes separated by a gap of around 15 nm, and are completed with the deposition of a zinc oxide or aluminium-doped ZnO layer from solution. The Schottky diodes exhibit a maximum intrinsic cutoff frequency in excess of 100 GHz, and when integrated with other passive components yield radio-frequency energy-harvesting circuits that are capable of delivering output voltages of 600 mV and 260 mV at 2.45 GHz and 10 GHz, respectively.</p