A tunable floating-gate CMOS transconductor based on current multiplication

In this paper a novel transconductor based on floating gate techniques that performs current multiplication for tuning is presented. The multiplication is achieved using transistors operating in weak and moderate inversion together with floating voltage sources implemented conveniently by floating capacitors. Besides, a tuning scheme is proposed to set the transconductance parameter accurately. The resulting circuit features compactness, low voltage operation, and rail-to-rail input range. Measurement and simulation results using a 0.5um CMOS technology are presented to confirm all the circuits and strategies proposed

Subsampling OFDM-based ultrasonic data communication through metallic channels for monitoring of cargo containers

An enhanced ultrasonic communication system based on piezoelectric transducers for monitoring of goods in cargo containers is presented. The proposed system consists of several sensors placed inside the container, whose data are collected and transmitted outside it. Data transmission is carried out by an ultrasonic communication channel, in order to avoid drilling the wall of the container. The proposed data communication system is based on the transmission of a 128-OFDM signal. This modulation has been chosen due to its robustness to channels with frequency-selective fading and its spectrum efficiency. In order to increase the signal bandwidth and to reduce the power consumption at the internal node (transmitter), the proposed system exploits the non-linearity of the metallic channel to transmit at higher resonance frequencies. Moreover, power consumption at the external node (receiver) is reduced by using a subsampling based receiver, which allows its implementation by low-cost electronics.This work was supported by the Spanish Ministry of Economy and Competitiveness under Projects TEC2016-80396-C2-2-R and TEC2016-80396-C2-1-

Analog Lock-In Amplifier Design Using Subsampling for Accuracy Enhancement in GMI Sensor Applications

A frequency downscaling technique for enhancing the accuracy of analog lock-in amplifier (LIA) architectures in giant magneto-impedance (GMI) sensor applications is presented in this paper. As a proof of concept, the proposed method is applied to two different LIA topologies using, respectively, analog and switching-based multiplication for phase-sensitive detection. Specifically, the operation frequency of both the input and the reference signals of the phase-sensitive detector (PSD) block of the LIA is reduced through a subsampling process using sample-and-hold (SH) circuits. A frequency downscaling from 200 kHz, which is the optimal operating frequency of the employed GMI sensor, to 1 kHz has been performed. In this way, the proposed technique exploits the inherent advantages of analog signal multiplication at low frequencies, while the principle of operation of the PSD remains unaltered. The circuits were assembled using discrete components, and the frequency downscaling proposal was experimentally validated by comparing the measurement accuracy with the equivalent conventional circuits. The experimental results revealed that the error in the signal magnitude measurements was reduced by a factor of 8 in the case of the analog multipliers and by a factor of 21 when a PSD based on switched multipliers was used. The error in-phase detection using a two-phase LIA was also reduced by more than 25%