18 research outputs found
Fabrication and electrical characterization of homo- and hetero-structure Si/SiGe nanowire Tunnel Field Effect Transistor grown by vapor-liquid-solid mechanism
We demonstrate the fabrication and electrical characterization of Ω-gate Tunnel Field Effect Transistors (TFET) based on p-Si/i-Si/n+Si0.7Ge0.3 heterostructure nanowires grown by Chemical Vapor Deposition (CVD) using the vapor-liquid-solid (VLS) mechanism. The electrical performances of the p-Si/i-Si/n+Si0.7Ge0.3 heterostructure TFET device are presented and compared to Si and Si0.7Ge0.3 homostructure nanowire TFETs. We observe an improvement of the electrical performances of TFET with p-Si/i-Si/n+Si0.7Ge0.3 heterostructure nanowire (HT NW). The optimized devices present an Ion current of about 245 nA at VDS = -0.5 V and VGS = -3 V with a subthreshold swing around 135 mV/dec. Finally, we show that the electrical results are in good agreement with numerical simulation using Kane's Band-to-Band Tunneling model
Efficient Electrical Transport Through Oxide‐Mediated InP‐on‐Si Hybrid Interfaces Bonded at 300 °C
International audienceFor CMOS processing compatibility, hybrid bonding of III-V materials on Silicon should be operated below 300°C, requiring an interfacial layer as thin as possible in order not to hamper the electrical transport through the interface. Both SiO 2 and ZnO interfacial layers have been investigated in the case of n-InP/n-Si hybrid heterostructures. Efficient electrical transport through oxide-mediated bonded InP/Si heterostructures is demonstrated, related to tunneling through the oxide-interfacial layer. These electrically-operated oxide-interfacial-layer heterostructures provide both efficient bonding processing and open the field for full 3D design and operation of optoelectronic devices
Low contact resistivity for GaAs, InAs, InGaAs epitaxially grown on 300mm Si(001) substrate by MOCVD
posterInternational audienc
Efficient Electrical Transport Through Oxide‐Mediated InP‐on‐Si Hybrid Interfaces Bonded at 300 °C
Anti-phase boundaries–Free GaAs epilayers on “quasi-nominal” Ge-buffered silicon substrates
International audienc
Low resistance contacts on heavily doped GaAs and In53Ga47As grown on 300mm Si(100) substrates by MOCVD
session Heterointegration and Optoelectronic Devices (I.5.4)International audienc
Epitaxial growth of antiphase boundary free GaAs layer on 300 mm Si(001) substrate by metalorganic chemical vapour deposition with high mobility
International audienceMetal organic chemical vapor deposition of GaAs on standard nominal 300 mm Si(001) wafers was studied. Antiphase boundary (APB) free epitaxial GaAs films as thin as 150 nm were obtained. The APB-free films exhibit an improvement of the room temperature photoluminescence signal with an increase of the intensity of almost a factor 2.5. Hall effect measurements show an electron mobility enhancement from 200 to 2000 cm2/V s. The GaAs layers directly grown on industrial platform with no APBs are perfect candidates for being integrated as active layers for nanoelectronic as well as optoelectronic devices in a CMOS environment
Anti-phase boundary free GaSb layers grown on (001)-Si substrates by Metal Organic Chemical Vapor Deposition
International audienc
Growth of anti-phase boundaries free GaAs on slightly miscut Si and Ge-buffered Si substrates
International audienc
Spatially correlated structural and optical characterization of a single InGaAs quantum well fin selectively grown on Si by microscopy and cathodoluminescence techniques
International audienc