298 research outputs found

    Tuning fork type Ultra Wide Band (UWB) antenna

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    In this work a tuning fork type structure of Ultra Wideband (UWB) antenna is proposed. The antenna offers excellent performance for UWB system, ranging from 3.7 GHz to 13.8 GHz. The antenna exhibits a 10 dB return loss bandwidth over the entire frequency band. The rectangular patch antenna is designed on FR4 substrate and fed with 50 ohms microstrip line by optimizing the width of partial ground, the width and position of the feedline to operate in UWB. The rectangular patch is then modified to tuning fork structure by maintaining UWB frequency range

    Modeling of a carbon nanotube sensing device

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    A sensing device is modeled and discussed in this paper. The modeling is done by using carbon nanotubes. This carbon nanotube based sensing device makes it possible produce huge amount of nano chips as a disposable cartridge for diagnostic purposes. Modeling of nano-electrode, characterization and electrochemical detection of DNA hybridization is discussed here. The results shows that the importance of diagnostics with demonstrated characteristics of high sensitivity, reliability and inexpensive micro-fabrication for cost effectiveness

    Optimum performance of carbon nanotube field effect transistor

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    Phenomenological predictions have been elucidated in this paper. The predictions are elaborated for the field effect transistor using carbon nanotube (CNT) technology. CNTs have small band gap compare to other traditional semiconductor technologies. The modeling of a single wall nanotube with optimum bandgap for the designing of the carbon nanotube (CNTFET) is the aim of this work. Analysis of I-V characteristics of CNTFET with the drain current-voltage analytical relation enables the lower energy consumption from the proposed design. In this research, the optimum carbon nanotube (CNTs) is analyzed where the bandgap is 0.45eV as well as the diameter is 1.95nm. Modeling of CNTFET will be useful for semiconductor industries in order to manufacture the nano scale device

    Small band-gap-based CNT for modeling of nano sensor

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    Modeling phenomena of small band-gap Carbon Nanotube (CNT) is analyzed in this paper. Device physics of CNT is studied and do the calculation of sub-band for zigzag CNT to model small band-gap tubes. Each carbon nanotube is illustrated as a single graphite sheet turned round into a cylindrical shape so that the arrangement is one dimensional with axial proportion. A comparison is made with the current literature to show that the proposed chirality CNT with small band-gap which performs the modeling of nano sensor. Furthermore, a sensing device is modeled and discussed in this paper. This carbon nanotube based sensing device makes it possible produce huge amount of nano chips as a disposable cartridge for diagnostic purposes. The optimum CNT is proposed in this paper to model a nano-electrode device. This research outcome shows that the importance of identification with verified uniqueness of high reliability and economical micro-fabrication for cost effectiveness

    CNTFET inverter: a high voltage gain logic gate

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    Conventional CMOS technology provides a lot of opportunities in the field of electronics device. But presently, carbon nanotube field effect transistor (CNTFET) is a new technology for the application in the field of electronic device. Due to the limitation of the size of CMOS, CNTFETs are the promising substitute due to its nano scale size. CNTFET also shows the high stability, low power circuit design, high signal to noise margin (SNM) and high gain in the circuit design. A novel design of CNTFET based inverter with an optimum chiral vector is proposed in this paper. PSPICE platform is used to model and simulation this CNTFET inverter circuit. The proposed CNTFET inverter circuit is investigated based on noise margin characteristics. A maximum voltage gain of 45dB is observed from NCNTFET of the inverter and a high noise margin of 400mV and a low noise margin of 309mV are achieved from the proposed inverters. This approach is a useful technique for fabricating integrated logic devices and circuits based on CNTFETs

    Spatio-temporal patterns of under-five mortality in Matlab HDSS in rural Bangladesh

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    Background: Knowledge of spatial and temporal distributions of mortality and morbidity is important to prioritise areas for adjusting the public health system where people need services most. A Health and Demographic Surveillance System (HDSS) plays an important role where accurate national vital events are not available in identifying areas and periods with excess mortality risks. Methods: The HDSS in Matlab, a rural area of Bangladesh, provided data on yearly number of deaths and children aged below 5 years for each of 90 villages during 1998–2007, along with village location points, longitudes and latitudes. Kulldorff's space–time scan statistic was used to identify villages and periods that experienced high mortality risks in the HDSS area with a statistical significance of p<0.001. Logistic regression was conducted to examine if village-level education and economic status explained village-level mortality risks. Results: There were 3,434 deaths among children aged below 5 years in the HDSS area during 1998–2007 with an average yearly rate of 13 deaths per 1,000 under-five child-years. The mortality rate showed a declining trend with high concentration in 1998–2002, but not in 2003–2007. Two clusters of villages had significantly higher mortality risks in 1998–2002, but not later, and the mortality risks in the high-risk clusters reduced little, but remained significant after controlling for adult education and economic status at village level. Conclusions: Spatial clustering of childhood mortality observed during 1998–2002 had disappeared in subsequent years with a decline in mortality rates. Space–time scanning helps identify high-risk areas and periods to enhance public health actions

    Design of a pierce oscillator for CMOS SAW resonator

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    Development of microelectromechanical system (MEMS) based oscillators have drawn significant attention because it provides CMOS compatibility and multifrequency operations on a single chip. Recently, integrated MEMS resonators have shown great performance by attaining high quality factors and high frequency operations of up to the GHz range. Of interest, is fully integrated SAW resonator which can be connected to an oscillator circuit on the same chip. For oscillator circuit simulations, the CMOS SAW resonator was modeled using its RLC equivalent circuits. The insertion loss of CMOS SAW resonator used in this design is 35.8dB, with motional resistance Rx=8.95kฮฉ and the motional capacitance and inductance are Cx=199aF and Lx=350uH. For a MEMS resonator to be able to function as an oscillator it needs to be coupled with supporting circuits. There are various types of supporting oscillator circuit topologies namely the pierce oscillator, differential amplifier oscillator or the transimpedance amplifier circuit topology. The topology to be chosen depends on the design requirement, the loop gain of 1 and the zero phase shifts. For this work, the pierce circuit topology was chosen due to its simplicity and high frequency stability. This simple circuit comprising of 4 transistors, helps to achieve low power consumption and excellent phase noise characteristics. This paper will present the analysis, design and the simulation result of a high gain (>; 36dB) and low power pierce circuit topology for MEMS CMOS SAW resonator. The circuit was designed in 0.18um CMOS technology and yield open loop gain >; 36dB
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