On the Verification of a WiMax Design Using Symbolic Simulation

The system-On-Chip design process is continuously increasing in terms of cost and complexity. This imposes new modeling and verification challenges. A particular example is heavy computational applications and functionality, such as digital signal processing and telecommunication applications, which are increasingly integrated in embedded systems nowadays. To meet these challenges, designers use a multilevel model based approach, which is a top-down design methodology where the behavior of the system is first modeled at a higher level of abstraction. Then, design decisions are made to refine those models in a number of transformations until the final product is realized. In this thesis we verify an implementation of a WiMax modem physical layer that has been designed according to the multilevel design approach. This implementation is provided by STMicroelectronics. We propose the utilization of two verification methodologies to verify designs at higher levels of abstraction. The first one is an equivalence checking methodology that is based on symbolic simulation, which provides high speed and computational capabilities. The main purpose of this methodology is to verify the functional equivalence of refined system models in the design process. The second methodology is a property checking approach, which is also based on symbolic simulation. It verifies the conformance of models at different levels of abstraction with the system specification. We verified the equivalence of three models of the WiMax system at different levels of abstraction, and we verified the correctness of various system properties on those models

On the Verification of a WiMax Design Using Symbolic Simulation

In top-down multi-level design methodologies, design descriptions at higher levels of abstraction are incrementally refined to the final realizations. Simulation based techniques have traditionally been used to verify that such model refinements do not change the design functionality. Unfortunately, with computer simulations it is not possible to completely check that a design transformation is correct in a reasonable amount of time, as the number of test patterns required to do so increase exponentially with the number of system state variables. In this paper, we propose a methodology for the verification of conformance of models generated at higher levels of abstraction in the design process to the design specifications. We model the system behavior using sequence of recurrence equations. We then use symbolic simulation together with equivalence checking and property checking techniques for design verification. Using our proposed method, we have verified the equivalence of three WiMax system models at different levels of design abstraction, and the correctness of various system properties on those models. Our symbolic modeling and verification experiments show that the proposed verification methodology provides performance advantage over its numerical counterpart.Comment: In Proceedings SCSS 2012, arXiv:1307.802