1,482 research outputs found
Front-end Electronics for Timing with pico-seconds precision using 3D Trench Silicon Sensors
The next generation of experiments at colliders demands detectors with
extreme performance in terms of spatial resolution, radiation hardness and
timing capabilities. In this sense, pixel sensors with sizes of a few tens of
, timing resolution of tens of pico-seconds and radiation resistance to
particle fluences in the range of MeV neutron equivalent per cm
are required. 3D silicon sensors, recently developed within the TimeSPOT
initiative, appear as a suitable solution to cope with such demanding
requirements. In order to accurately characterize the timing performance of
this new sensors, several read-out boards, based on discrete active components,
have been designed, assembled, and tested. The same electronics is also
suitable for the characterization of similar pixel sensors whenever timing
performance in the range and below 10-ps is a requirement. This paper describes
the general characteristics needed by front-end electronics to exploit solid
state sensors with high timing capabilities and in particular illustrates the
performance of the developed electronics in the test and characterization of
fast 3D silicon sensors
Intrinsic timing properties of ideal 3D-trench silicon sensor with fast front-end electronics
This paper describes the fundamental timing properties of a single-pixel
sensor for charged particle detection based on the 3D-trench silicon structure.
We derive the results both analytically and numerically by considering a simple
ideal sensor and the corresponding fast front-end electronics in two different
case scenarios: ideal integrator and real fast electronics (trans-impedance
amplifier). The particular shape of the Time of Arrival (TOA) distribution is
examined and the relation between the time resolution and the spread of
intrinsic charge collection time is discussed, by varying electronics
parameters and discrimination thresholds. The results are obtained with and
without simulated electronics noise. We show that the 3D-trench sensors are
characterized by a , i.e. a portion of the active volume
which leads to the same TOA values when charged particles cross it. The
synchronous region size is dependent on the front-end electronics and
discrimination threshold, and the phenomenon represents an intrinsic physical
effect that leads to the excellent time resolution of these sensors. Moreover,
we show that the TOA distribution is characterized by an intrinsic asymmetry,
due to the 3D geometry only, that becomes negligible in case of significant
electronics jitter
A 28-nm CMOS pixel read-out ASIC for real-time tracking with time resolution below 20 ps
We present the development of a test ASIC, named Timespot1, designed in CMOS 28-nm technology, featuring a 32x32 pixel matrix and a pitch of 55 μm, The ASIC is conceived as the first prototype in a series, capable to read-out pixels with timing capabilities in the range of 30 ps and below. Each pixel is endowed with a charge amplifier, a discriminator and a Time-to-Digital-Converter, capable of time resolutions below 20 ps and read-out rates (per pixel) around 3 MHz. The timing performance are obtained respecting a power budget of about 50 μW per pixel, corresponding to a power density of approximately 2 W/cm 2 · This feature makes the Timespot1 approach an interesting solution for vertex detectors of the next generation of colliders, where high space and time resolutions will be mandatory requirements to cope with the huge amount of tracks per event to be detected and processed
Timespot1: A 28nm CMOS Pixel Read-Out ASIC for 4D Tracking at High Rates
We present the first characterization results of Timespot1, an ASIC designed
in CMOS 28 nm technology, featuring a pixel matrix with a pitch
of . Timespot1 is the first small-size prototype, conceived to
readout fine-pitch pixels with single-hit time resolution below and input rates of several hundreds of kilohertz per pixel. Such
experimental conditions will be typical of the next generation of
high-luminosity collider experiments, from the LHC run5 and beyond. Each pixel
of the ASIC includes a charge amplifier, a discriminator, and a Time-to-Digital
Converter with time resolution indicatively of and
maximum readout rates (per pixel) of . To respect system-level
constraints, the timing performance has been obtained keeping the power budget
per pixel below . The ASIC has been tested and characterised in the
laboratory concerning its performance in terms of time resolution, power budget
and sustainable rates. The ASIC will be hybridized on a matched
pixel sensor matrix and will be tested under laser beam and Minimum Ionizing
Particles in the laboratory and at test beams. In this paper we present a
description of the ASIC operation and the first results obtained from
characterization tests concerning its performance
The first ASIC prototype of a 28 nm time-space front-end electronics for real-time tracking
A front-end ASIC for 4D tracking is presented. The prototype includes the block necessary to build a pixel front-end chain for timing measurement, as independent circuits. The architecture includes a charge-sensitive amplifier, a discriminator with programmable threshold, and a time- to-digital converter. The blocks were designed with target specifications in mind including: an area occupation of 55 μm × 55 μm, a power consumption tens of micro ampere per channel and timing a resolution of at least 100 ps. The prototype has been designed and integrated in 28 nm CMOS technology. The presented design is part of the TimeSpOT project which aims to reach a high-resolution particle tracking both in space and in time, in order to provide front-end circuitry suitable for next generation colliders
Contrast-Induced Acute Kidney Injury and Endothelial Dysfunction: The Role of Vascular and Biochemical Parameters
Introduction: Contrast-induced acute kidney injury (CIAKI) is one of the main causes
of acute renal failure in hospitalized patients, following the administration of iodinated contrast
medium used for CT scans and angiographic procedures. CIAKI determines a high cardiovascular
risk and appears to be one of the most feared complications of coronary angiography, causing a
notable worsening of the prognosis with high morbidity and mortality. Aim: To evaluate a possible
association between the renal resistive index (RRI) and the development of CIAKI, as well as an
association with the main subclinical markers of atherosclerosis and the main cardiovascular risk
factors. Materials and Methods: We enrolled 101 patients with an indication for coronary angiography.
Patients underwent an assessment of renal function (serum nitrogen and basal creatinine, 48 and 72 h
after administration of contrast medium), inflammation (C reactive protein (CRP), serum calcium and
phosphorus, intact parathormone (iPTH), 25-hydroxyvitaminD (25-OH-VitD), serum uric acid (SUA),
total cholesterol, serum triglycerides, serum glucose and insulin). All patients also carried out an
evaluation of RRI, intima-media thickness (IMT), interventricular septum (IVS) and the ankle-brachial
index (ABI). Results: 101 patients (68 male), with a mean age of 73.0 ± 15.0 years, were enrolled for
the study; 35 are affected by type 2 diabetes mellitus. A total of 19 cases of CIAKI were reported
(19%), while among diabetic patients we reported an incidence of 23% (8 patients). In our study,
patients with CIAKI had significantly higher RRI (p < 0.001) and IMT (p < 0.001) with respect to the
patients who did not develop CIAKI. Furthermore, patients with CIAKI had significantly higher CRP
(p < 0.001) and SUA (p < 0.006). Conclusions: We showed a significant difference in RRI, IMT, SUA
and CRP values between the population developing CIAKI and patients without CIAKI. This data
appears relevant considering that RRI and IMT are low-cost, non-invasive and easily reproducible
markers of endothelial dysfunction and atherosclerosis
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