Mapping LSSVM on Digital Hardware

In this paper we show how to map a LSSVM on digital hardware. In particular, we provide a theoretical analysis of quantization effects, due to finite register lengths, that leads to some useful bounds for computing the necessary number of bits for a correct hardware implementation. Then, we describe a new FPGA-based architecture, the KTRON, which implements the feed-forward phase of a LSSVM

Evaluating the Generalization Ability of Support Vector Machines through the Bootstrap

The well-known bounds on the generalizationability of learning machines, based on the Vapnik\u2013Chernovenkis (VC) dimension,are very loose when applied to Support Vector Machines (SVMs).In this work we evaluate the validity of the assumption that these bounds are,nevertheless, good indicators of the generalization ability of SVMs.We show that this assumption is, in general, true and assess its correctness, in a statistical sense, on several pattern recognition benchmarks through the use of the bootstrap technique