Speeding up a scalable modular inversion hardware architecture

The modular inversion is a fundamental process in several cryptographic systems. It can be computed in software or hardware, but hardware computation proven to be faster and more secure. This research focused on improving an old scalable inversion hardware architecture proposed in 2004 for finite field GF(p). The architecture has been made of two parts, a computing unit and a memory unit. The memory unit is to hold all the data bits of computation whereas the computing unit performs all the arithmetic operations in word (digit) by word bases known as scalable method. The main objective of this project was to investigate the cost and benefit of modifying the memory unit to include parallel shifting, which was one of the tasks of the scalable computing unit. The study included remodeling the entire hardware architecture removing the shifter from the scalable computing part embedding it in the memory unit instead. This modification resulted in a speedup to the complete inversion process with an area increase due to the new memory shifting unit. Quantitative measurements of the speed area trade-off have been investigated. The results showed that the extra hardware to be added for this modification compared to the speedup gained, giving the user the complete picture to choose from depending on the application need.the British council in Saudi Arabia, KFUPM, Dr. Tatiana Kalganova at the Electrical & Computer Engineering Department of Brunel University in Uxbridg

Scalable VLSI design for fast GF (p) montgomery inverse computation

This paper accelerates a scalable GF(p) Montgomery inversion hardware. The hardware is made of two parts a memory and a computing unit. We modified the original memory unit to include parallel shifting of all bits which was a task handled by the computing unit. The new hardware modeling, simulating, and synthesizing is performed through VHDL for several 160-bits designs showing interesting speedup to the inverse computation.British council in Saudi Arabia, KFUPM, Electrical & Computer Engineering Department of Brunel University in Uxbridg

GF(2 K) elliptic curve cryptographic processor architecture based n bit level pipelined digit serial multiplication

Summary form only given. New processor architecture for elliptic curve encryption is proposed. The architecture exploits projective coordinates to convert GF(2 k) division needed in elliptic point operations into several multiplication steps. The processor has three GF(2 k) multipliers implemented using bit-level pipelined digit serial computation. It is shown that this results in a faster operation than using fully parallel multipliers with the added advantage of requiring less area. The proposed architecture is a serious contender for implementing data security systems based on elliptic curve cryptography

GF(2 K) elliptic curve cryptographic processor architecture based n bit level pipelined digit serial multiplication

Summary form only given. New processor architecture for elliptic curve encryption is proposed. The architecture exploits projective coordinates to convert GF(2 k) division needed in elliptic point operations into several multiplication steps. The processor has three GF(2 k) multipliers implemented using bit-level pipelined digit serial computation. It is shown that this results in a faster operation than using fully parallel multipliers with the added advantage of requiring less area. The proposed architecture is a serious contender for implementing data security systems based on elliptic curve cryptography

Fast elliptic curve cryptographic processor architecture based on three parallel GF(2/sup k/) bit level pipelined digit serial multipliers

Unusual processor architecture for elliptic curve encryption is proposed in this paper. The architecture exploits projective coordinates (x=X/Z, y=Y/Z) to convert GF(2/sup k/) division needed in elliptic point operations into several multiplication steps. The processor has three GF(2/sup k/) multipliers implemented using bit-level pipelined digit serial computation. It is shown that this results in a faster operation than using fully parallel multipliers with the added advantage of requiring less area. The proposed architecture is a serious contender for implementing data security systems based on elliptic curve cryptography

High radix parallel architecture for GF(p) elliptic curve processor

A new GF(p) cryptographic processor architecture for elliptic curve encryption/decryption is proposed in this paper. The architecture takes advantage of projective coordinates to convert GF(p) inversion needed in elliptic point operations into several multiplication steps. Unlike existing sequential designs, we show that projecting into (X/Z,Y/Z) leads to a much better performance than the conventional choice of projecting into the current (X/Z/sup 2/,Y/Z/sup 3/). We also propose to use high radix modulo multipliers which give a wide range of area-time trade-offs. The proposed architecture is a significant challenger for implementing data security systems based on elliptic curve cryptography

Integrating Light-Weight Cryptography with Diacritics Arabic Text Steganography Improved for Practical Security Applications

Cryptography and steganography are combined to provide practical data security. This paper proposes integrating light-weight cryptography with improved Arabic text steganography for optimizing security applications. It uses light-weight cryptography to cope with current limited device capabilities, to provide acceptable required security. The work tests hiding encrypted secret information within Arabic stego-cover texts, using all common diacritics found naturally in the Arabic language. The study considers different challenging situations and scenarios in order to evaluate security practicality. It further carries out simulations on some short texts from the Holy Quran, taking them as standard authentic texts, that are fixed and trusted, therefore providing realistic study feedback that is worth monitoring. Our improved approach features preferred capacity and security, surpassing the best previous diacritics stego approach, showing interesting potential results for attractive enlightening exploration to come