25 research outputs found

    Avalanche-Induced Current Enhancement in Semiconducting Carbon Nanotubes

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    Semiconducting carbon nanotubes under high electric field stress (~10 V/um) display a striking, exponential current increase due to avalanche generation of free electrons and holes. Unlike in other materials, the avalanche process in such 1D quantum wires involves access to the third sub-band, is insensitive to temperature, but strongly dependent on diameter ~exp(-1/d^2). Comparison with a theoretical model yields a novel approach to obtain the inelastic optical phonon emission length, L_OP,ems ~ 15d nm. The combined results underscore the importance of multi-band transport in 1D molecular wires

    A Comparison Between GaAs Mesfet and Si NMOS ESD Behaviour

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    Work is in hand at Loughborough University to investigate and compare the ESD sensitivity of GaAs D-MESFETs and unprotected enhancement mode NMOS structures

    Failure mechanisms in MOS devices

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    Continuous and pulsed voltage stressmg of metal oxide semiconductor (MOS) transistors and capacitors has been mvestigated. The expenmental work followed a survey of failure mechanisms in semiconductor devices which Identified Electrical Overstress Damage (EOS)/Electrostatic Discharge (ESD) damage as the most frequent cause of failure, accounting for over 50% of all damage observed. The survey itself, covered all aspects of semiconductor reliability including reliability modelling and quality assurance. A qualitative model of oxide breakdown in MOS structures was developed as a result of the experimental work. Two different mechanisms have been proposed for continuous and pulsed voltage breakdown. Continuous voltage breakdown simulating EOS conditions, was temperature and voltage dependent. The long time-scales involved, lead to a model whereby breakdown IS the result of conduction of charge earners through the oxide, via electron traps and impunty Sites with energies m the forbidden gap. Pulsed voltage breakdown simulating ESD, was voltage dependent but not temperature dependent. The very short time-scales involved indicate that breakdown is the direct result of electron transport m the oxide conduction band. Electrons are inJected into the conduction band via quantum-mecharucal tunnelling from the cathode. Both mechanisms were found to be dependent on the surface charge concentratiOn of the Silicon and, therefore, polanty dependent. The models explain this effect by analysing the charge injection process under high electric fields

    ESD Protection Circuits for High-Speed I/OS

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