열린충남 45호-[오피니언]'허준'처럼 관심을 모을 방법은?

얼마나 많은 시청자들이 TV프로그램을 보고 있는지를 알아보기 위한 척도로 시청률이라는 것이 있다. 전체 TV중 해당 프로그램을 보고 있는 TV대수의 비율을 말한다. 우리나라에는 지금 두 개의 시청률 조사기관(회사)이 서울을 비롯한 대전, 광주, 대구, 부산 등 대도시를 대상으로 시청률 조사를 하고 있다. 대전의 경우 TNS와 AGB닐슨 등 두 회사에서 대전에 있는 150~200가구에 피플미터라는 장치를 달아주고 시청하는 채널을 실시간으로 집계하고 있다.N/

Combustion characteristics of water-in-oil emulsion droplets

본 연구에서는 유화연료 액적의 연소시에 나타나는 일반적인 연소특성과 이에 미치는 압력의 영향에 대하여 실험적인 방법으로 연구를 수행하였다. 고압용기내에서 유화연료의 단일 액적을 연소시키면서 그 연소과정을 고속으로 촬영하여 분석하는 한편, 연소과정중의 액적 내부의 온도변화를 측정하였다. 고압 용기내의 압력은 대기압으로부터 10atm까지, 연료에 대한 물의 혼합비는 체적비로 0-20%까지 변화시키면서, 유화연료 액적의 연소특성에 미치는 물의 함량과 압력변화의 영향을 분석하였

초저전력 IoT 애플리케이션을 위한 공정 확장 가능한 초저전압 슬립 타이머 회로

학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2024.2,[v, 71 p. :]The growth of the battery-powered wireless market, especially in the context of IoT and biomedical applications, has driven the demand for ultra-low-power (ULP) wireless systems. These ULP systems have a wide range of applications, from bio-signal acquisition devices to smart homes and factories. Efficient energy management is critical for ULP wireless systems due to limited energy sources and high energy demands of radio transmission and computing. Duty cycling, which involves turning on specific system blocks only when needed, is a key strategy to conserve energy. The accuracy of the sleep timer, a crucial component in duty cycling, affects the overall energy consumption of ULP wireless nodes. Various types of sleep timers, such as crystal oscillators, MEMS oscillators, and on-chip sleep timers, are used to manage power consumption and accuracy. On-chip sleep timers can achieve accuracy better than $\pm$500 ppm with the help of lookup tables and temperature sensors. Additionally, on-chip sleep timers are cost-effective as compared to external crystal or MEMS oscillators. They eliminate the need for additional components, reducing the bill of materials (BOM) cost and simplifying the overall design. However, the impact of process scaling on on-chip sleep timers is a significant challenge. Process scaling leads to increased leakage currents, which affects the sleep timer's intrinsic temperature dependency. To address this issue, this dissertation proposes a new architectural-level change which is the ultra-low-voltage (ULV) sleep timer architecture. ULV architecture helps limit intrinsic temperature dependency, reducing the calibration burden, including temperature sensor resolution. In this dissertation, conventional FLL-based on-chip sleep timer architectures are classified into three types: voltage-domain, phase-domain, and current-domain. Each has its advantages and challenges, with voltage-domain being simple but challenging to implement in ULV, phase-domain offering in-situ temperature digitization but adding power overhead, and current-domain offering good temperature-dependence performance but being challenging in ULV due to VDD-hungry circuits. This dissertation presents a new on-chip sleep timer architecture, based on time-domain FLL, that is process-scalable. The proposed IC is built in ULV to limit intrinsic temperature dependency by suppressing leakage levels. It replaces VDD-hungry circuits with scalable ones, offers reference resistance multiplication without adding significant temperature dependency, and provides in-situ temperature digitization for LUT-based calibration.한국과학기술원 :전기및전자공학부