Didelės galios puslaidininkinių silicio prietaisų p-n sandūros krašto pasyvacija

Thin dielectric passivation layer is one of the basic construction elements in semiconductor device technology. There are few materials, from which the layers may be manufactured. They are oxides mainly, with Si02 as the most popular of them, although, the phosphor- and boron-silicon glasses are used as passivation layers, too. In choosing a passivant of power thyristors and diodes, there are two important considerations in addition to the usual requirement for providing uniform high breakdown voltage via substrate. One consideration is the thermal stability of the passivant to subsequent high-temperature processes. The other consideration is the bias-temperature stability of the passivation layers affecting the operation life expectancy of a device. In the technology of thyristors and diodes on silicon substrates the bias-breakdown voltage is not uniform over substrate due to non-homogeneity of passivated surface of the p-n junction. In this work, passivation of moat surface by means of electrochemical etching, formation of hydrogen-rich porous silicon layers and glass in-melting steps has been investigated. Passivation quality was controlled by the measurements of surface recombination characteristics after each technological step using a non-invasive technique, which employed microwave probed photoconductivity transients (MW-PCT). It has been shown that electrochemical etching - glass melting steps involved in passivation technological procedures resulted in a decrease of surface recombination velocity from 3X10^3 cm/s to 10 cm/s. Thus, the passivation quality approached to that of suppressed surface recombination velocity obtained for silicon wafers exploiting the iodine ethanol solutions

Investigation of porous silicon layers as passivation coatings for high voltage silicon devices

The porous silicon layer as the passivation coating for high voltage devices is proposed. PS layers having different thickness and porosity were prepared and analyzed. The dependence of the thickness on the anodization time and the effect of current density and electrolyte composition on the porosity were determined and found proportional within a good range. For this reason, is proposed to etch formed electrochemical oxide with gathered impurities inside the layer. Imroved rezults could be explained of growing broader the groove. But with removing the oxidized layer collectivelly removes gathered impurities from the bulk, what couldn`t effect growing broader of the groove. A new bottom-hole-assisted approach based on a forward biased np-junction for manufacturing n-PS layer is discussed. Illumination is an optional hole-source in the fabrication of n-type PS. The bottom-hole-assisted approach can overcome the illumination-limitation and depth-limitation problems in conventional only-illumination-assisted approach. With the bottom-hole-assistance, the anodization etching is almost anisotropic

Formation of Nanostructured Layers for Passivation of High Power Silicon Devices

Nanocrystalline porous silicon films, which have been formed by using simple wet electrochemical etching process in HF electrolyte, were applied for passivation of high power silicon diodes. An optimal technology was designed to manufacture a uniform layer of porous silicon over the area of the p-n junction. The 8% increase in the yield was achieved onO100 mm diameter wafers with 69 cells of diodes in each, by using a very simple technology for the formation of porous layer for passivation of high power silicon diodes

Sulydomų diodų elektrinių charakteristikų eksperimentinis tyrimas

Eksperimentiškai ištirta sulydomų diodų tiesioginių ir atgalinių įtampų priklausomybė nuo silicio plokštelės savitosios varžos ir storio. Išnagrinėtos atgalinių įtampų priklausomybės nuo ėsdinimo HF rūgštyje trukmės. Ištirta diodų tiesioginių ir atgalinių įtampų priklausomybė nuo sulydymo temperatūrų profilio pasiskirstymo. Gauti eksperimentinio tyrimo rezultatai patvirtina, kad, mažėjant savitajam silicio sluoksnio laidumui, didėja tiesioginių įtampų vertės. Išanalizavus sulydyto diodo tiesioginės varžos dedamąsias, padaryta išvada, kad esminę įtaką tiesioginei įtampai turi silicio sluoksnio varža. Eksperimentiškai patvirtinta, kad, norint gauti mažesnes tiesioginių įtampų vertes, reikia ploninti Si plokšteles, apribojant paviršines varžas. Ištirta paviršiaus ėsdinimo trukmės įtaka pramušimo įtampoms. Nustatyta, kad ilgiau ėsdinant HF rūgštyje pašalinamas perteklinis Al – Si sluoksnis ir priartėjama prie pn sandūros, kuri pasyvuojama su polimerine guma ir taip pagerinamos atgalinės įtampos vertės. Nustatyta elektrinių charakteristikų priklausomybė nuo sulydymo profilio trečiosios zonos temperatūrų [...]