Didelės galios puslaidininkinių silicio prietaisų p-n sandūros krašto pasyvacija

Abstract

Thin dielectric passivation layer is one of the basic construction elements in semiconductor device technology. There are few materials, from which the layers may be manufactured. They are oxides mainly, with Si02 as the most popular of them, although, the phosphor- and boron-silicon glasses are used as passivation layers, too. In choosing a passivant of power thyristors and diodes, there are two important considerations in addition to the usual requirement for providing uniform high breakdown voltage via substrate. One consideration is the thermal stability of the passivant to subsequent high-temperature processes. The other consideration is the bias-temperature stability of the passivation layers affecting the operation life expectancy of a device. In the technology of thyristors and diodes on silicon substrates the bias-breakdown voltage is not uniform over substrate due to non-homogeneity of passivated surface of the p-n junction. In this work, passivation of moat surface by means of electrochemical etching, formation of hydrogen-rich porous silicon layers and glass in-melting steps has been investigated. Passivation quality was controlled by the measurements of surface recombination characteristics after each technological step using a non-invasive technique, which employed microwave probed photoconductivity transients (MW-PCT). It has been shown that electrochemical etching - glass melting steps involved in passivation technological procedures resulted in a decrease of surface recombination velocity from 3X10^3 cm/s to 10 cm/s. Thus, the passivation quality approached to that of suppressed surface recombination velocity obtained for silicon wafers exploiting the iodine ethanol solutions