FPGA based High Speed ECG Signal Diagnosis for Artifacts

The paper is dedicated to the design of multiband digital FIR filter for removal of various interference signals present in the ECG signal which does not allow the correct diagnosis of the patient. Filtering is finding its applications in wide domains and one of those domains is the biomedical science. ECG is the electrical response of the heart with respect to time. Heart diseases especially heart attacks are way common today and to detect this very precise detailing is required. There is no scope for allowed interference level or noise which corrupts the signal. Seven band filter is designed which will remove the frequencies that are prone to disturbances i.e. the various spectral components where particular type of noise from different sources dominates like noise from power line, respiration, muscle movement etc. The filter is developed and designed in Matlab along with Xilinx DSP tools synthesized with XST using Spartan 6 and Virtex 5 as target device. Filter is optimized using DA based architecture to increase the speed and maximum area utilization is obtained. The processing speed is efficiently optimized up to 28.36% with Virtex 5 as compared to Spartan 6 with the maximum area utilization in the presented paper

Reconfigurable Channel Interference Reduction for Vehicular Communication Applications

Vehicular Communication systems, an application of wireless communication is an increasing area of communication between the vehicles and other roadside infrastructure in which allocation of wireless channels are used to share information among vehicles and infrastructure and hence these channels are used for the development and implementation of vehicular communication systems. The 10 MHz wide channels in 5.9GHz spectrum band are reserved for this purpose by two main protocols the WAVE standards proposed by IEEE in the United States and ETSI ITS-G5 in Europe. But still the cross ?channel interference affect the vehicular communication systems. So to reduce these problems, this paper presents the implementation of two-stage low pass equiripple FIR filter, target to be integrated with digital baseband receiver chain of vehicular communication platform. The proposed filter has been developed using Matlab and Xilinx DSP Tools and implemented with XST software using Spartan 3E and Virtex 2p FPGA device to ensure the minimum delay generated in operation and to show the effectiveness of the proposed filter. The results show that the processing speed is efficiently optimized up to 19.70 % for stage 1 and 10.50 % for stage 2 using virtex 2p over Spartan 3E with maximum area utilization