Voltage-driven Building Block for Hardware Belief Networks

Probabilistic spin logic (PSL), based on networks of binary stochastic neurons (or p-bits), has been shown to provide a viable framework for many functionalities including Ising computing, Bayesian inference, invertible Boolean logic and image recognition. This paper presents a hardware building block for the PSL architecture, consisting of an embedded MTJ and a capacitive voltage adder of the type used in neuMOS. We use SPICE simulations to show how identical copies of these building blocks (or weighted p-bits) can be interconnected with wires to design and solve a small instance of the NP-complete Subset Sum Problem fully in hardware

Probabilistic Circuits for Autonomous Learning: A simulation study

Modern machine learning is based on powerful algorithms running on digital computing platforms and there is great interest in accelerating the learning process and making it more energy efficient. In this paper we present a fully autonomous probabilistic circuit for fast and efficient learning that makes no use of digital computing. Specifically we use SPICE simulations to demonstrate a clockless autonomous circuit where the required synaptic weights are read out in the form of analog voltages. Such autonomous circuits could be particularly of interest as standalone learning devices in the context of mobile and edge computing

Transport Theory for Materials with Spin-Orbit Coupling: Physics to Devices

Materials with spin-orbit coupling (SOC) exhibiting spin-momentum locking (SML) are of great current interest in spintronics because of their ability to efficiently convert charge signals into spin signals and vice versa. This dissertation develops a generalized diffusion equation with four electrochemical potentials starting from the standard Boltzmann transport equation and maps it to a transmission line model. This model applies to diverse materials with SOC including topological insulators, transition metals, narrow bandgap semiconductors, perovskite oxides, etc. and presents a new viewpoint suggesting that materials with low Fermi wave vector lead to larger spin voltages. The model has been used to make a number of predictions some of which have later received experimental confirmation up to room temperature. We also use it to propose new devices for writing and reading information to and from magnets. Specifically, we show using experimentally established phenomena that magnetic state can be read without conventional magnetoresistive devices. We analyze the proposals with SPICE compatible multi-physics framework along with a new model developed in this dissertation for pure spin conduction by magnon diffusion in ferromagnetic insulators

Voltage-Driven Building Block for Hardware Belief Networks

Probabilistic spin logic (PSL), based on networks of binary stochastic neurons (or p-bits), has been shown to provide a viable framework for many functionalities including Ising computing, Bayesian inference, invertible Boolean logic and image recognition. This paper presents a hardware building block for the PSL architecture, consisting of an embedded MTJ and a capacitive voltage adder of the type used in neuMOS. We use SPICE simulations to show how identical copies of these building blocks (or weighted p-bits) can be interconnected with wires to design and solve a small instance of the NP-complete Subset Sum Problem fully in hardware