FABRICATION OF PHOTONIC DEVICES ON LITHIUM NIOBATE ON INSULATOR (LNOI) CHIPS

Master'sMASTER OF ENGINEERIN

High-speed and Robust Integrated Silicon Nanophotonics for On-Chip Interconnects

Optical interconnects offer advantages over electrical interconnects such as higher bandwidth, low power, reduced interconnects delay, and immunity to electro-magnetic interference and signal crosstalk. However, in order for optical interconnects to be widely adopted, the technology must be made cost effective and must be simple to implement with CMOS electronics. Silicon photonics offers a great promise due to its inexpensive material and its compatibility with the current CMOS fabrication technology. Moreover, Silicon as a platform has the ability to integrate with different types of the optical components such as photodetector, modulator, light source, and waveguide to form a photonics integrated circuit. The goal of this work is to develop and fabricate devices that utilize a hybrid electronic-photonic integration to enable high performance optoelectronic computing and communication systems that overcome the barriers of electronics and dramatically enhance the performance of circuits and systems. We experimentally demonstrate a novel broadband optical time division multiplexer (OTDM) on a silicon chip. The system has a footprint× 700 micrometer and is inherently broadband with a bandwidth of over 100nm making it suitable for high-speed optical networks on chip. Also, we propose and fabricate a novel design to demultiplex the high bit rates of OTDM data using two differentially operated 5Gb/s modulators. Moreover, we propose a high-speed hybrid optical-time-division-multiplexing (OTDM) and wavelength-division-multiplexing (WDM) system that seamlessly generates high bit-rate data (\u3e200Gbit/s) from a low speed (5Gbit/s) quantum-dot mode locked laser pulse source. By utilizing time and wavelength domains, the proposed design is a promising solution for high-speed, compact and low-power consumption optical networks on chip. And finally, we experimentally demonstrate a robust, low insertion loss, compact Silicon ring resonator electro-optic modulator for Binary Phase Shift Key (BPSK) coding/decoding that encodes data in the phase of light. Our design improves significantly over recently demonstrated PSK modulator designs in terms of insertion loss and stability

Ultra-low loss integrated visible photonics using thin-film lithium niobate

Integrated photonics is a powerful platform that can improve the performance and stability of optical systems, while providing low-cost, small-footprint and scalable alternatives to implementations based on free-space optics. While great progress has been made on the development of low-loss integrated photonics platforms at telecom wavelengths, visible wavelength range has received less attention. Yet, many applications utilize visible or near-visible light, including those in optical imaging, optogenetics, and quantum science and technology. Here we demonstrate an ultra-low loss integrated visible photonics platform based on thin film lithium niobate on insulator. Our waveguides feature ultra-low propagation loss of 6 dB/m, while our microring resonators have an intrinsic quality factor of 11 million, both measured at 637 nm wavelength. Additionally, we demonstrate an on-chip visible intensity modulator with an electro-optic bandwidth of 10 GHz, limited by the detector used. The ultra-low loss devices demonstrated in this work, together with the strong second- and third-order nonlinearities in lithium niobate, open up new opportunities for creating novel passive, and active devices for frequency metrology and quantum information processing in the visible spectrum range

Multi-Layer Ultra-Wideband Wilkinson Combiner for Arrays

This work investigates an ultra-wideband (UWB), compact, and multilayer Wilkinson power combiners for tightly coupled array (TCA) designs. The Wilkinson topology designs encompass UHF, L-, and S-bands. These combiners integrate into an experimental UWB TCA. The experimental UWB TCA divides into twenty-four columns, with each column containing eight unit cells, and each cell one-inch square. The Wilkinson power combiner contains eight input ports and one output port. Twenty-four combiners mount to the TCA’s back. The combiner condenses the two-dimensional array (8x24) to a one-dimensional or linear array (1x24). The proposed Wilkinson power combiner possesses a multilayer design reducing common mode current problems caused by vias. The Wilkinson combiner covers 500 MHz to 3.28 GHz and provides a 6.56:1 bandwidth. It achieves tight impedance matching through stripline coupling. The proposed design provides minimal phase error, equal power reception, and low power handling. The power combiner interfaces with an experimental UWB TCA antenna through SMP snap connectors. This paper examines signal combining efficiency to provide minimum path loss. This paper also examines interconnecting transmission lines traversing multiple laminate layers. This necessitates proper current handling because interconnects influence impedance, transmission, and isolation. Integrating a via picket fence improves port isolation and reduces propagating parallel plate modes. The proposed combiner design achieved the following important attributes at or better than the minimum required specifications. The measured combiner design successfully demonstrated -7.8dB minimum return loss for input and -18.1dB return loss for the outputs; 10.92dB ± 1.28dB insertion loss; -12.2db minimum isolation; ± 1.38° minimal phase error; ± 0.57dB power reception imbalance. The proposed UWB combiner design condensed the four-stage Wilkinson footprint to consume no more than 0.4in² (258mm²) surface area, weighed only 1.5oz (42.5g), and less than a half-inch thick

High Efficiency Silicon Photonic Interconnects

Silicon photonic has provided an opportunity to enhance future processor speed by replacing copper interconnects with an on chip optical network. Although photonics are supposed to be efficient in terms of power consumption, speed, and bandwidth, the existing silicon photonic technologies involve problems limiting their efficiency. Examples of limitations to efficiency are transmission loss, coupling loss, modulation speed limited by electro-optical effect, large amount of energy required for thermal control of devices, and the bandwidth limit of existing optical routers. The objective of this dissertation is to investigate novel materials and methods to enhance the efficiency of silicon photonic devices. The first part of this dissertation covers the background, theory and design of on chip optical interconnects, specifically silicon photonic interconnects. The second part describes the work done to build a 300mm silicon photonic library, including its process flow, comprised of basic elements like electro-optical modulators, germanium detectors, Wavelength Division Multiplexing (WDM) interconnects, and a high efficiency grating coupler. The third part shows the works done to increase the efficiency of silicon photonic modulators, unitizing the χ(3) nonlinear effect of silicon nanocrystals to make DC Kerr effect electro-optical modulator, combining silicon with lithium niobate to make χ(2) electro-optical modulators on silicon, and increasing the efficiency of thermal control by incorporating micro-oven structures in electro-optical modulators. The fourth part introduces work done on dynamic optical interconnects including a broadband optical router, single photon level adiabatic wavelength conversion, and optical signal delay. The final part summarizes the work and talks about future development

Silicon Photonic Subsystems for Inter-Chip Optical Networks

The continuous growth of electronic compute and memory nodes in terms of the number of I/O pins, bandwidth, and areal throughput poses major integration and packaging challenges associated with offloading multi-Tbit/s data rates within the few pJ/bit targets. While integrated photonics are already deployed in long and short distances such as inter and intra data centers communications, the promising characteristics of the silicon photonic platform set it as the future technology for optical interconnects in ultra short inter-chip distances. The high index contrast between the waveguide and the cladding together with strong thermo-optic and carrier effects in silicon allows developing a wide range of micro-scale and low power optical devices compatible with the CMOS fabrication processes. Furthermore, the availability of photonic foundries and new electrical and optical co-packaging techniques further pushes this platform for the next steps of commercial deployment. The work in this dissertation presents the current trends in high-performance memory and processor nodes and gives motivation for disaggregated and reconfigurable inter-chip network enabled with the silicon photonic layer. A dense WDM transceiver and broadband switch architectures are discussed to support a bi-directional network of ten hybrid-memory cubes (HMC) interconnected to ten processor nodes with an overall aggregated bandwidth of 9.6Tbit/s. Latency and energy consumption are key performance parameters in a processor to primary memory nodes connectivity. The transceiver design is based on energy-efficient micro-ring resonators, and the broadband switch is constructed with 2x2 Mach-Zehnder elements for nano-second reconfiguration. Each transceiver is based on hundreds of micro-rings to convert the native HMC electrical protocol to the optical domain and the switch is based on tens of hundreds of 2x2 elements to achieve non-blocking all-to-all connectivity. The next chapters focus on developing methods for controlling and monitoring such complex and highly integrated silicon photonic subsystems. The thermo-optic effect is characterized and we show experimentally that the phase of the optical carrier can be reliably controlled with pulse-width modulation (PWM) signal, ultimately relaxing the need for hundreds of digital to analog converters (DACs). We further show that doped waveguide heaters can be utilized as \textit{in-line} optical power monitors by measuring photo-conductance current, which is an alternative for the conventional tapping and integration of photo-diodes. The next part concerned with a common cascaded micro-ring resonator in a WDM transceiver design. We develop on an FPGA control algorithm that abstracts the physical layer and takes user-defined inputs to set the resonances to the desired wavelength in a unicast and multicast transmission modes. The associated sensitivities of these silicon ring resonators are presented and addressed with three closed-loop solutions. We first show a closed-loop operation based on tapping the error signal from the drop port of the micro-ring. The second solution presents a resonance wavelength locking with a single digital I/O for control and feedback signals. Lastly, we leverage the photo-conductance effect and demonstrate the locking procedure using only the doped heater for both control and feedback purposes. To achieve the inter-chip reconfigurability we discuss recent advances of high-port-count SiP broadband switches for reconfigurable inter-chip networks. To ensure optimal operation in terms of low insertion loss, low cross-talk and high signal integrity per routing path, hundreds of 2x2 Mach-Zehnder elements need to be biased precisely for the cross and bar states. We address this challenge with a tapless and a design agnostic calibration approach based on the photo-conductance effect. The automated algorithm returns a look-up table for all for each 2x2 element and the associated calibrated biases. Each routing scenario is then tested for insertion loss, crosstalk and bit-error rate of 25Gbit/s 4-level pulse amplitude modulation signals. The last part utilizes the Mach-Zehnder interferometers in WDM transceiver applications. We demonstrate a polarization insensitive four-channel WDM receiver with 40Gbit/s per channel and a transmitter design generating 8-level pulse amplitude modulation signals at 30Gbit/s

Photo Thermal Effect Graphene Detector Featuring 105 Gbit s-1 NRZ and 120 Gbit s-1 PAM4 Direct Detection

The challenge of next generation datacom and telecom communication is to increase the available bandwidth while reducing the size, cost and power consumption of photonic integrated circuits. Silicon (Si) photonics has emerged as a viable solution to reach these objectives. Graphene, a single-atom thick layer of carbon5, has been recently proposed to be integrated with Si photonics because of its very high mobility, fast carrier dynamics and ultra-broadband optical properties. Here, we focus on graphene photodetectors for high speed datacom and telecom applications. High speed graphene photodetectors have been demonstrated so far, however the most are based on the photo-bolometric (PB) or photo-conductive (PC) effect. These devices are characterized by large dark current, in the order of milli-Amperes , which is an impairment in photo-receivers design, Photo-thermo-electric (PTE) effect has been identified as an alternative phenomenon for light detection. The main advantages of PTE-based photodetectors are the optical power to voltage conversion, zero-bias operation and ultra-fast response. Graphene PTE-based photodetectors have been reported in literature, however high-speed optical signal detection has not been shown. Here, we report on an optimized graphene PTE-based photodetector with flat frequency response up to 65 GHz. Thanks to the optimized design we demonstrate a system test leading to direct detection of 105 Gbit s-1 non-return to zero (NRZ) and 120 Gbit s-1 4-level pulse amplitude modulation (PAM) optical signal

Photon manipulation in silicon nanophotonic circuits

Quantum-based communication systems can potentially achieve the ultimate security from eavesdropping and greatly reduce the operating powers on chip. Light-speed transmission, noise immunity, and low noise properties make photons indispensable for quantum communication to transfer a quantum state through a transmission line. Furthermore, the field of silicon nanophotonics is fast growing field which is driven by the attractive and promising improvements it has to offer in high speed communication systems and on chip optical interconnects. Consequently, there is a high demand to develop the building blocks for photon manipulation in silicon nanophotonic circuits. The goal of the work is to enable high performance optoelectronic computing and communication systems that overcome the barriers of electronics and dramatically enhance the performance of circuits and systems. We will focus our attention on solving some of the issues with the current systems regarding photon storage, routing, isolation, switching, and energy conversion. We realize a continuously tunable optical memory which breaks the time-bandwidth limit by more than thirty times. This enabled the storage of ultra-short pulses of light for hundreds of picoseconds. Also, we investigate on-chip photon scattering when transmitted through micro-scale optical cavities. In addition, we develop novel dynamic quantum mechanical models that predict quantum-like behavior of single and multi-photon wavepackets. Furthermore, we report for the first time that efficient red shifts in silicon are achievable with free carrier injection which generally produces blue wavelength shifts. We realize adiabatic wavelength conversion and discrete photonic transitions of single photons in silicon cavities. Moreover, we demonstrate a basic quantum network on chip with an on-chip photon source. We present a novel design for CMOS compatible optical isolator on silicon chip using a system of active cavities. And finally, we analyze a novel ultra-fast broadband modulator in silicon based on free-carrier absorption effect in SOI waveguides integrated with Schottky diodes