Towards Accurate One-Stage Object Detection with AP-Loss

One-stage object detectors are trained by optimizing classification-loss and localization-loss simultaneously, with the former suffering much from extreme foreground-background class imbalance issue due to the large number of anchors. This paper alleviates this issue by proposing a novel framework to replace the classification task in one-stage detectors with a ranking task, and adopting the Average-Precision loss (AP-loss) for the ranking problem. Due to its non-differentiability and non-convexity, the AP-loss cannot be optimized directly. For this purpose, we develop a novel optimization algorithm, which seamlessly combines the error-driven update scheme in perceptron learning and backpropagation algorithm in deep networks. We verify good convergence property of the proposed algorithm theoretically and empirically. Experimental results demonstrate notable performance improvement in state-of-the-art one-stage detectors based on AP-loss over different kinds of classification-losses on various benchmarks, without changing the network architectures. Code is available at https://github.com/cccorn/AP-loss.Comment: 13 pages, 7 figures, 4 tables, main paper + supplementary material, accepted to CVPR 201

A Thick Industrial Design Studio Curriculum

This presentation was part of the session : Pedagogy: Procedures, Scaffolds, Strategies, Tactics24th National Conference on the Beginning Design StudentThis paper describes an industrial design studio course based in a private university in Izmir, Turkey where second year industrial design students, for the first time, engage in a studio project. The design studio course emphasises three distinct areas of competence in designing that are the focus of the curriculum. They are; design process: the intellectual act of solving a design problem; design concept: the imagination and sensibility to conceive of appropriate design ideas; and presentation: the ability to clearly and evocatively communicate design concepts. The studio is 'thick' with materials, tasks and activities that are intentionally sequenced to optimise learning in a process that is known as educational 'scaffolding.' The idea of a process--a patient journey toward it's destination, is implicit in the studio that is full of opportunities for reflection-in-action. A significant feature is the importance placed on drawing and model making. An exemplary design process should show evidence of 'breadth'--meaning a wide search for solutions where a range of alternatives explored throughout; followed by an incremental refinement of the chosen solution where elements of the final design concept are developed thoroughly and in detail--called 'depth.' Learning to design is predicated on an engagement in and manipulation of the elements of the design problem. Evidence of that learning will be found by examining the physical materials and results of the design process. The assessment criteria are published with the brief at the outset of design project and outcomes are spelt out at the end. Students are remind throughout project of the criteria, which is to say they are reminded of pedagogical aims of the studio. Assessment criteria are detailed and the advantages of summative assessment are described

Massively parallel approximate Gaussian process regression

We explore how the big-three computing paradigms -- symmetric multi-processor (SMC), graphical processing units (GPUs), and cluster computing -- can together be brought to bare on large-data Gaussian processes (GP) regression problems via a careful implementation of a newly developed local approximation scheme. Our methodological contribution focuses primarily on GPU computation, as this requires the most care and also provides the largest performance boost. However, in our empirical work we study the relative merits of all three paradigms to determine how best to combine them. The paper concludes with two case studies. One is a real data fluid-dynamics computer experiment which benefits from the local nature of our approximation; the second is a synthetic data example designed to find the largest design for which (accurate) GP emulation can performed on a commensurate predictive set under an hour.Comment: 24 pages, 6 figures, 1 tabl

PIXOR: Real-time 3D Object Detection from Point Clouds

We address the problem of real-time 3D object detection from point clouds in the context of autonomous driving. Computation speed is critical as detection is a necessary component for safety. Existing approaches are, however, expensive in computation due to high dimensionality of point clouds. We utilize the 3D data more efficiently by representing the scene from the Bird's Eye View (BEV), and propose PIXOR, a proposal-free, single-stage detector that outputs oriented 3D object estimates decoded from pixel-wise neural network predictions. The input representation, network architecture, and model optimization are especially designed to balance high accuracy and real-time efficiency. We validate PIXOR on two datasets: the KITTI BEV object detection benchmark, and a large-scale 3D vehicle detection benchmark. In both datasets we show that the proposed detector surpasses other state-of-the-art methods notably in terms of Average Precision (AP), while still runs at >28 FPS.Comment: Update of CVPR2018 paper: correct timing, fix typos, add acknowledgemen

Automatic synthesis of analog layout : a survey

A review of recent research in the automatic synthesis of physical geometry for analog integrated circuits is presented. On introduction, an explanation of the difficulties involved in analog layout as opposed to digital layout is covered. Review of the literature then follows. Emphasis is placed on the exposition of general methods for addressing problems specific to analog layout, with the details of specific systems only being given when they surve to illustrate these methods well. The conclusion discusses problems remaining and offers a prediction as to how technology will evolve to solve them. It is argued that although progress has been and will continue to be made in the automation of analog IC layout, due to fundamental differences in the nature of analog IC design as opposed to digital design, it should not be expected that the level of automation of the former will reach that of the latter any time soon