93 research outputs found
Memristive Computing
Memristive computing refers to the utilization of the memristor, the fourth
fundamental passive circuit element, in computational tasks.
The existence of the memristor was theoretically predicted in 1971 by
Leon O. Chua, but experimentally validated only in 2008 by HP Labs. A
memristor is essentially a nonvolatile nanoscale programmable resistor —
indeed, memory resistor — whose resistance, or memristance to be precise,
is changed by applying a voltage across, or current through, the device.
Memristive computing is a new area of research, and many of its fundamental
questions still remain open. For example, it is yet unclear which
applications would benefit the most from the inherent nonlinear dynamics
of memristors. In any case, these dynamics should be exploited to allow
memristors to perform computation in a natural way instead of attempting
to emulate existing technologies such as CMOS logic. Examples of such
methods of computation presented in this thesis are memristive stateful logic
operations, memristive multiplication based on the translinear principle, and
the exploitation of nonlinear dynamics to construct chaotic memristive circuits.
This thesis considers memristive computing at various levels of abstraction.
The first part of the thesis analyses the physical properties and the
current-voltage behaviour of a single device. The middle part presents memristor
programming methods, and describes microcircuits for logic and analog
operations. The final chapters discuss memristive computing in largescale
applications. In particular, cellular neural networks, and associative
memory architectures are proposed as applications that significantly benefit
from memristive implementation. The work presents several new results on
memristor modeling and programming, memristive logic, analog arithmetic
operations on memristors, and applications of memristors.
The main conclusion of this thesis is that memristive computing will
be advantageous in large-scale, highly parallel mixed-mode processing architectures.
This can be justified by the following two arguments. First,
since processing can be performed directly within memristive memory architectures,
the required circuitry, processing time, and possibly also power
consumption can be reduced compared to a conventional CMOS implementation.
Second, intrachip communication can be naturally implemented by
a memristive crossbar structure.Siirretty Doriast
Experimental Demonstration of Non-Stateful In-Memory Logic with 1T1R OxRAM Valence Change Mechanism Memristors
Processing-in-memory (PIM) is attractive to overcome the limitations of
modern computing systems. Numerous PIM systems exist, varying by the
technologies and logic techniques used. Successful operation of specific logic
functions is crucial for effective processing-in-memory. Memristive
non-stateful logic techniques are compatible with CMOS logic and can be
integrated into a 1T1R memory array, similar to commercial RRAM products. This
paper analyzes and demonstrates two non-stateful logic techniques: 1T1R logic
and scouting logic. As a first step, the used 1T1R SiO\textsubscript{x} valence
change mechanism memristors are characterized in reference to their feasibility
to perform logic functions. Various logical functions of the two logic
techniques are experimentally demonstrated, showing correct functionality in
all cases. Following the results, the challenges and limitations of the RRAM
characteristics and 1T1R configuration for the application in logical functions
are discussed.Comment: 5 pages, 6 figure
Memristors for the Curious Outsiders
We present both an overview and a perspective of recent experimental advances
and proposed new approaches to performing computation using memristors. A
memristor is a 2-terminal passive component with a dynamic resistance depending
on an internal parameter. We provide an brief historical introduction, as well
as an overview over the physical mechanism that lead to memristive behavior.
This review is meant to guide nonpractitioners in the field of memristive
circuits and their connection to machine learning and neural computation.Comment: Perpective paper for MDPI Technologies; 43 page
Computers from plants we never made. Speculations
We discuss possible designs and prototypes of computing systems that could be
based on morphological development of roots, interaction of roots, and analog
electrical computation with plants, and plant-derived electronic components. In
morphological plant processors data are represented by initial configuration of
roots and configurations of sources of attractants and repellents; results of
computation are represented by topology of the roots' network. Computation is
implemented by the roots following gradients of attractants and repellents, as
well as interacting with each other. Problems solvable by plant roots, in
principle, include shortest-path, minimum spanning tree, Voronoi diagram,
-shapes, convex subdivision of concave polygons. Electrical properties
of plants can be modified by loading the plants with functional nanoparticles
or coating parts of plants of conductive polymers. Thus, we are in position to
make living variable resistors, capacitors, operational amplifiers,
multipliers, potentiometers and fixed-function generators. The electrically
modified plants can implement summation, integration with respect to time,
inversion, multiplication, exponentiation, logarithm, division. Mathematical
and engineering problems to be solved can be represented in plant root networks
of resistive or reaction elements. Developments in plant-based computing
architectures will trigger emergence of a unique community of biologists,
electronic engineering and computer scientists working together to produce
living electronic devices which future green computers will be made of.Comment: The chapter will be published in "Inspired by Nature. Computing
inspired by physics, chemistry and biology. Essays presented to Julian Miller
on the occasion of his 60th birthday", Editors: Susan Stepney and Andrew
Adamatzky (Springer, 2017
ClaPIM: Scalable Sequence CLAssification using Processing-In-Memory
DNA sequence classification is a fundamental task in computational biology
with vast implications for applications such as disease prevention and drug
design. Therefore, fast high-quality sequence classifiers are significantly
important. This paper introduces ClaPIM, a scalable DNA sequence classification
architecture based on the emerging concept of hybrid in-crossbar and
near-crossbar memristive processing-in-memory (PIM). We enable efficient and
high-quality classification by uniting the filter and search stages within a
single algorithm. Specifically, we propose a custom filtering technique that
drastically narrows the search space and a search approach that facilitates
approximate string matching through a distance function. ClaPIM is the first
PIM architecture for scalable approximate string matching that benefits from
the high density of memristive crossbar arrays and the massive computational
parallelism of PIM. Compared with Kraken2, a state-of-the-art software
classifier, ClaPIM provides significantly higher classification quality (up to
20x improvement in F1 score) and also demonstrates a 1.8x throughput
improvement. Compared with EDAM, a recently-proposed SRAM-based accelerator
that is restricted to small datasets, we observe both a 30.4x improvement in
normalized throughput per area and a 7% increase in classification precision
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