5 research outputs found
High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network
Neuromorphic computing systems overcome the limitations of traditional von
Neumann computing architectures. These computing systems can be further
improved upon by using emerging technologies that are more efficient than CMOS
for neural computation. Recent research has demonstrated memristors and
spintronic devices in various neural network designs boost efficiency and
speed. This paper presents a biologically inspired fully spintronic neuron used
in a fully spintronic Hopfield RNN. The network is used to solve tasks, and the
results are compared against those of current Hopfield neuromorphic
architectures which use emerging technologies
Efficient Neuromorphic Computing Enabled by Spin-Transfer Torque: Devices, Circuits and Systems
Present day computers expend orders of magnitude more computational resources to perform various cognitive and perception related tasks that humans routinely perform everyday. This has recently resulted in a seismic shift in the field of computation where research efforts are being directed to develop a neurocomputer that attempts to mimic the human brain by nanoelectronic components and thereby harness its efficiency in recognition problems. Bridging the gap between neuroscience and nanoelectronics, this thesis demonstrates the encoding of biological neural and synaptic functionalities in the underlying physics of electron spin. Description of various spin-transfer torque mechanisms that can be potentially utilized for realizing neuro-mimetic device structures is provided. A cross-layer perspective extending from the device to the circuit and system level is presented to envision the design of an All-Spin neuromorphic processor enabled with on-chip learning functionalities. Device-circuit-algorithm co-simulation framework calibrated to experimental results suggest that such All-Spin neuromorphic systems can potentially achieve almost two orders of magnitude energy improvement in comparison to state-of-the-art CMOS implementations