Developing Variation Aware Simulation Tools, Models, and Designs for STT-RAM

DEVELOPING VARIATION AWARE SIMULATION TOOLS, MODELS, AND DESIGNS FOR STT-RAM Enes Eken, PhD University of Pittsburgh, 2017 In recent years, we have been witnessing the rise of spin-transfer torque random access memory (STT-RAM) technology. There are a couple of reasons which explain why STT-RAM has attracted a great deal of attention. Although conventional memory technologies like SRAM, DRAM and Flash memories are commonly used in the modern computer industry, they have major shortcomings, such as high leakage current, high power consumption and volatility. Although these drawbacks could have been overlooked in the past, they have become major concerns. Its characteristics, including low-power consumption, fast read-write access time and non-volatility make STT-RAM a promising candidate to solve the problems of other memory technologies. However, like all other memory technologies, STT-RAM has some problems such as long switching time and large programming energy of Magnetic Tunneling Junction (MTJ) which are waiting to be solved. In order to solve these long switching time and large programming energy problems, Spin-Hall Effect (SHE) assisted STT-RAM structure (SHE-RAM) has been recently invented. In this work, I propose two possible SHE-RAM designs from the aspects of two different write access operations, namely, High Density SHE-RAM and Disturbance Free SHE-RAM, respectively. In addition to the SHE-RAM designs, I will also propose a simulation tool for STT-RAMs. As an early-stage modeling tool, NVSim has been widely adopted for simulations of emerging nonvolatile memory technologies in computer architecture research, including STT-RAM, ReRAM, PCM, etc. I will introduce a new member of NVSim family – NVSim-VXs, which enables statistical simulation of STT-RAM for write performance, errors, and energy consumption