Emission source microscopy for electromagnetic interference source localization

For complex and large systems with multiple sources, it is often difficult to localize the sources of radiation. Near-field electromagnetic scanning is used often for root-cause diagnosis by determining field distribution close to the PCB. In the near-field, the evanescent waves are dominant, which may lead to the misinterpretation of them being the dominant sources contributing to the far-field. Another limitation of near-field scanning is that the probe may not be able to access all locations near the PCB due to the complex geometry and high component density. Two-dimensional synthetic aperture radar is a well-known technique used for antenna diagnostic and alignment of phase array antennas. Using a technique which is derived from the synthetic aperture radar we present emission source microscopy to localize the sources of active radiation on a PCB. After obtaining the location of sources, using near field to far-field transformation, it is shown that the far-field radiation patterns and the total radiated power can be estimated. Using masking algorithms the contribution of individual sources to far-field can be determined. The source localization methodology is presented along with simulation and measurement results on real-DUTs. The results show that the proposed method is capable of detecting multiple active sources on a complex PCB. Different phase measurement methods are presented along with the measurement results. Also, methods to reduce the scanning time for source localization are presented --Abstract, page iii

Characterization of an Integrated Circuit with Respect to Electrostatic Discharge-Induced Soft Failures

This research proposal presents a methodology whereby an integrated circuit (IC) can be characterized with respect to soft-failures induced by Electrostatic Discharge (ESD)-like events. This methodology uses an exclusively black-box approach to determine the response of an IC in a system-level environment, thereby allowing it to be implemented without intimate knowledge of the DUT IC. Results from this methodology can be referenced during system design to raise awareness of specific vulnerabilities of the core system ICs. During work on this methodology, several sub topics have been explored and developed in the field of system-level ESD. Sections 2 and 3 introduce two topics which were developed to facilitate the generation and expression of IC pin models. Papers 1 and 2 introduce injection methods for characterizing complete systems on an interface-by-interface basis and form the foundation for the following works. Papers 2 and 3 mirror Papers 1 and 2 but instead shift focus away from the system as a whole and outline methods for characterizing the integrated circuits directly. Finally, Section 4 outlines a model method which can be used to describe the failures found in Paper 4 in circuit simulation, rounding out the work. Additional measurements which were unable to be included in Paper 4 are included in Appendices A, B, and C --Abstract, page iv

Software-Based Analysis of the Effects of Electrostatic Discharge on Embedded Systems

This paper illustrates the use of software for monitoring and recording the effects of electrostatic discharge (ESD) on the operation of embedded systems, with the goal of facilitating root-cause analysis of resulting failures. Hard-warebased scanning techniques are typically used for analyzing the effect of ESD on systems by identifying physical coupling paths. This paper proposes software techniques that monitor registers and flags associated with peripherals of embedded systems to detect faults associated with the effects of ESD. A lightweight, cost-effective, and non-intrusive software tool has been developed that monitors and records the status of all registers associated with a designated peripheral under test, identifying the fault propagation caused by ESD in the system, and visually presenting the resulting errors. The tool has been used to detect and visually summarize ESD-induced errors on the SD card peripheral of the S3C2440 development board, using local injection and system-level scanning. Root-cause analysis of these faults can potentially assist in identification of coupling paths of electromagnetic interference, as well as determination of areas of the hardware that are more vulnerable to ESD