Basic mathematical function libraries for scientific computation

Ada packages implementing selected mathematical functions for the support of scientific and engineering applications were written. The packages provide the Ada programmer with the mathematical function support found in the languages Pascal and FORTRAN as well as an extended precision arithmetic and a complete complex arithmetic. The algorithms used are fully described and analyzed. Implementation assumes that the Ada type FLOAT objects fully conform to the IEEE 754-1985 standard for single binary floating-point arithmetic, and that INTEGER objects are 32-bit entities. Codes for the Ada packages are included as appendixes

Necessary and sufficient conditions for exact floating point operations

Studying floating point arithmetic, authors have shown that the implemented operations (addition, subtraction, multiplication, division and square root) can compute a result and an exact correcting term using the same format as the inputs. Following a path initiated in 1965, all the authors supposed that neither underflow nor overflow occurred in the process. Overflow is not critical as some kind of exception is triggered by such an event that creates remanent non numeric quantities. Underflow may be fatal to the process as it returns wrong numeric values with little warning. Our new necessary and sufficient conditions guarantee that the exact floating point operations are correct when the result is a number. We also present properties when precise rounding is not available in hardware and faithful rounding alone is performed such as using some digital signal processing circuit. We have validated our proofs against the Coq automatic proof checker. Our development has raised many questions, some of them were expected while other ones were very surprising.L’étude de l’arithmétique à virgule flottante a amené certains auteurs à démontrer que les opérations implantées (addition, soustraction, multiplication, division, racine carrée) peuvent calculer un résultat et un terme exact de correction en utilisant le même format que les entrées. Depuis 1965, tous les auteurs ont supposé qu’aucun dépassement de capacité vers l’infiniment petit ou vers l’infiniment grand ne se produisait. L’infiniment grand n’est pas dangereux car un évènement de ce type produit une exception associée à des quantités non numériques persistantes (NaN). L’infiniment petit peut être fatal au processus dans la mesure où il produit des résultat numériques faux avec peu d’avertissement. Nos nouvelles conditions nécessaires et suffisantes assurent que les opérations exactes à virgule flottante sont correctes quand le résultat est un nombre. Nous présentons aussi des résultats dans le cas où un arrondi précis n’est pas disponible en matériel et l’on effectue uniquement un arrondi fidèle comme c’est le cas lorsqu’on utilise certains circuits de traitement numérique du signal. Nous avons validé nos preuves grâce à l’assistant de preuve Coq. Notre développement a posé de nombreuses questions, nous nous attendions à certaines alors que d’autres nous ont surprises

An FPGA implementation of an investigative many-core processor, Fynbos : in support of a Fortran autoparallelising software pipeline

Includes bibliographical references.In light of the power, memory, ILP, and utilisation walls facing the computing industry, this work examines the hypothetical many-core approach to finding greater compute performance and efficiency. In order to achieve greater efficiency in an environment in which Moore’s law continues but TDP has been capped, a means of deriving performance from dark and dim silicon is needed. The many-core hypothesis is one approach to exploiting these available transistors efficiently. As understood in this work, it involves trading in hardware control complexity for hundreds to thousands of parallel simple processing elements, and operating at a clock speed sufficiently low as to allow the efficiency gains of near threshold voltage operation. Performance is there- fore dependant on exploiting a new degree of fine-grained parallelism such as is currently only found in GPGPUs, but in a manner that is not as restrictive in application domain range. While removing the complex control hardware of traditional CPUs provides space for more arithmetic hardware, a basic level of control is still required. For a number of reasons this work chooses to replace this control largely with static scheduling. This pushes the burden of control primarily to the software and specifically the compiler, rather not to the programmer or to an application specific means of control simplification. An existing legacy tool chain capable of autoparallelising sequential Fortran code to the degree of parallelism necessary for many-core exists. This work implements a many-core architecture to match it. Prototyping the design on an FPGA, it is possible to examine the real world performance of the compiler-architecture system to a greater degree than simulation only would allow. Comparing theoretical peak performance and real performance in a case study application, the system is found to be more efficient than any other reviewed, but to also significantly under perform relative to current competing architectures. This failing is apportioned to taking the need for simple hardware too far, and an inability to implement static scheduling mitigating tactics due to lack of support for such in the compiler