[[alternative]]Non-Slicing Floorplan with Clustering Constraints Using Corner Block List

[[abstract]]幾年來半導體產業蓬勃發展，造就了台灣經濟的起飛，但是現今積體電路晶片之設計，慢慢趨向智慧財產權（IP, Intellectual Property）的方向來設計。所以現在大部份積體電路在設計上，都會由一種以上的IP所組成，因此平面規劃（floorplan）這方面的問題，就顯得更加地重要。 在平面規劃的問題上，基於電路設計上的需求，某些模組在最後封裝的時候，必須滿足一些限制條件。而在我們的論文中，我們是利用偶角模組列（Corner Block List）表示法，配合我們的演算法，來解決在叢聚限制下之平面規劃問題，最後實驗結果，也証明我們的演算法有很好的效能。[[abstract]]Since integrated circuits design are tending to intellectual property (IP) mode. Circuits are composed of IP modules. Therefore, the floorplan problems are become important. In floorplan, some modules are required to satisfy some constraints in the final packing. In this thesis, we propose an algorithm based on Corner Block List for the floorplan with clustering constraints. Experiment results show that our algorithm is very efficient

[[alternative]]Non-Slicing Floorplan with Clustering Constraints by the Sequence Pair

[[abstract]]由於IC設計的複雜度越來越高，使得電路的尺寸也越變越大，為了要處理更複雜的IC設計問題，因此階層式設計與智慧財產權的觀念在今日備受歡迎，這個趨勢也導致平面規劃在設計流程當中扮演非常具關鍵性的角色，而在平面規劃的表示法當中，序列對的表示法是非常有彈性的，因此在本篇論文當中，我們研究以非切割性結構的序列對表示法來解決叢聚限制的問題，我們提出一種以模擬退火法為基礎的演算法，可以從解空間當中辨別出能滿足叢聚限制的解。 我們以MCNC benchmark circuits 實驗，其結果顯示，使用我們發展的叢聚限制判斷方式，無叢聚限制與叢聚限制其Dead Space的差異在0~4.03 %之間，其結果算是蠻不錯的。[[abstract]]Due to the growth in design complexity, circuit size is getting larger. To cope with the increasing design complexity, hierarchical design and Intellectual Properties(IP) modules are widely used. This trend makes block Floorplanning/placement much more critical to the quality of a design. The Sequence Pair representation is very flexible for floorplanning. In this thesis, we consider the problem of non-slicing floorplan with clustering constraints based on the Sequence Pair. We propose an algorithm based on the simulated annealing for the problem, it could distinguish the solution which satisfied the clustering constraints from the solution space. In our experiments, we use the MCNC benchmark circuits. The results show that the difference between the floorplans without clustering constraint and the floorplans with clustering constraint are in 0~4.03% in dead space. Experimental results are very well