3 research outputs found
Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors
Postprint. Trabajo presentado en IEEE International Symposium on Circuits and Systems, 2004In this paper the series-parallel association of transistors applied to current mirrors with a non-unity copy factor is studied with regard to mismatch. This technique has been demonstrated to be a valuable tool in the design of low-offset oriented analog circuits. Some measurements are presented as well as a minimum offset design
A fully integrated 0.5 -7 hz cmos bandpass amplifier
In this paper, the design methodology of a fully integrated gm-C, 0.5-7Hz band-pass amplifier is presented. The amplifier is designed to be employed in signal conditioning of a piezoelectric accelerometer, which is part of an implantable biomedical device. Transconductances of the OTAs range from 30pS to 100nS. Such low values of transconductances, which are required owing to the large time-constants involved, were obtained with the aid of a current division technique. Measurement results for OTA structures and part of the filter fabricated in a standard 0.8渭m technology are presented
Very large time constant Gm-C Filters
In this study a set of tools for the design of fully integrated transconductor-capacitor (Gm-C) filters, with very large time constants and current consumption under one micro-Ampere are presented. The selected application is a 2nd order bandpass-filter-amplifier, with a gain of 400 from 0.5 to 7Hz, carrying out the signal conditioning of a piezoelectric accelerometer which is part of an implantable cardiac pacemaker. The main challenge is to achieve very large time constants, without using any discrete external component. The chosen circuit technique to fulfill the requirement is series-parallel current division applied to standard symmetrical transconductors (OTAs). These circuits have demonstrated to be an excellent solution regarding their occupied area, power consumption, noise, linearity, and particularly offset. OTAs as low as 33pS -equivalent to a 30G resistor-, with up to 1V linear range, and input referred offset of a few mV, were designed, fabricated in a standard 0.8 micron CMOS technology, and tested. The application requires the series-parallel association of a large number of transistors, and the use of bias currents as low as a few pico-Amperes, which is not very common in analog integrated circuits. In this case the designer should employ maximum care in the selection of
the transistor models to be used. A central aspect of this thesis was also to evaluate and
develop noise and offset estimation models which was not obvious in the very beginning of
the research.
In the first two chapters an introduction to the target application is presented, and several
MOS transistor characteristics in terms of the inversion coefficient -using the ACM
transistor model- are evaluated.
In chapter 3 it is discussed whether the usual flicker and thermal noise models are consistent
regarding series-parallel association, and adequately represent the expected noise behavior
under different bias conditions. A consistent, physics-based, one-equation-all-regions model
for flicker noise in the MOS transistor is then presented. Several noise measurements are
included demonstrating that the new model accurately fits widely different bias situations. A
new model for mismatch offset in MOS transistors is presented, as a corollary of the flicker
noise analysis. Finally, the correlation between flicker noise and mismatch offset, that can
be seen as a DC noise, is shown.
In chapter 4, the design of OTAs with an extended linear range, and very low
transconductance, using series-parallel current division is presented. Precise tools are
introduced for the estimation of noise and mismatch offset in series-parallel current mirrors,
that are shown to help in the reduction of inaccuracies in the copy of currents with a large
copy factor. The design and measurement of several OTA examples are presented.
In chapter 5, the developed tools, and the OTAs shown, are employed in the design of the
above mentioned filter for the piezoelectric accelerometer. A general methodology for the
design of Gm-C filters with similar characteristics is established. The filter was fabricated and tested, successfully operating with a total power consumption of 233nA, up to a 2V
power supply, with an input noise and mismatch offset of 2-4 Vrms, and 18 V respectively.
To summarize the main results obtained were: The development of a new flicker noise
model, the study of the effect of mismatch regarding series-parallel association, a new
design methodology for OTAs and Gm-C filters. It is our hope that this constitutes a helpful
set of tools for the circuit designer.En esta tesis se presenta un conjunto de herramientas para el dise帽o de circuitos integrados
que implementan filtros transconductor-capacitor (Gm-C), de muy altas constantes de
tiempo, con bajo ruido, y consumo de corriente por debajo del micro-Ampere. Como
ejemplo de aplicaci贸n se toma un amplificador-pasabanda 2潞 orden, de ganancia 400 en la
banda de 0.5 a 7Hz, que realiza el acondicionamiento de se帽al de un aceler贸metro
piezoel茅ctrico a ser empleado en un marcapasos implantable. El principal desaf铆o es realizar
en dicho filtro de tiempo continuo, muy altas constantes de tiempo sin usar componentes
externos. La t茅cnica elegida para alcanzar tal objetivo es la divisi贸n serie-paralelo de
corriente en transconductores (OTAs) sim茅tricos est谩ndar. Estos circuitos demostraron ser
una excelente soluci贸n en cuanto al 谩rea ocupada, su consumo, ruido, linealidad, y en
particular offset. Se dise帽aron, fabricaron, y midieron, OTAs hasta 33pS -equivalente a una
resistencia de 30G -, con hasta 1V de rango de lineal, y offset a la entrada de algunos mV,
utilizando una tecnolog铆a CMOS de 0.8 micras de largo m铆nimo de canal. La aplicaci贸n
requiere la asociaci贸n serie-paralelo de un gran n煤mero de transistores, y polarizaci贸n con
corrientes de hasta pico-Amperes, lo que constituye una situaci贸n poco frecuente en
circuitos integrados anal贸gicos. En este marco el dise帽ador debe elegir los modelos de
transistor con sumo cuidado. Un aspecto central de esta tesis es tambi茅n, el estudio y
presentaci贸n de modelos adecuados de ruido y offset, que no resultan obvios al principio.
En los primeros dos cap铆tulos se realiza una introducci贸n y se revisa, utilizando el modelo
ACM, diferentes caracter铆sticas del transistor MOS en funci贸n del nivel de inversi贸n.
En el cap铆tulo 3 revisa la pertinencia y consistencia frente a la asociaci贸n serie-paralelo, de
los modelos usuales de ruido de flicker o 1/f, y t茅rmico. Luego se presenta, incluyendo
medidas, un nuevo modelo f铆sico, consistente, simple, y v谩lido en todas las regiones de
operaci贸n del transistor MOS, para el ruido de flicker. Como corolario a este estudio se
presenta un nuevo modelo para estimar el desapareo entre transistores, en funci贸n no solo de
la geometr铆a, pero tambi茅n de la polarizaci贸n. Se demuestra la correlaci贸n, debido a su
origen f铆sico an谩logo, entre el ruido de flicker y el offset por desapareo que puede ser visto
como un ruido en DC.
En el cap铆tulo 4 se presenta el dise帽o de OTAs con rango de linealidad extendido, y muy
baja transconductancia, utilizando divisi贸n serie-paralelo de corriente. Se presentan
herramientas precisas para la estimaci贸n de offset y ruido y se demuestra la utilidad de la
t茅cnica para reducir el offset en espejos de corriente. Se presenta el dise帽o y medida de
diversos OTAs.
En el cap铆tulo 5, las herramientas desarrolladas, y los OTAs presentados, son empleados en
el dise帽o del filtro descripto para un aceler贸metro piezoel茅ctrico. Se establece una
metodolog铆a general para el dise帽o de filtros Gm-C con caracter铆sticas similares. El filtro se
fabric贸 y midi贸, operando en forma satisfactoria, con un consumo total de 230nA y hasta los
2V de tensi贸n de alimentaci贸n, con ruido y offset a la entrada de tan solo 2-4 Vrms, y 18 V
respectivamente.
El desarrollo de un nuevo modelo de ruido 1/f para el transistor MOS, el estudio de la
influencia del offset frente a la asociaci贸n serie-paralelo y su aplicaci贸n en OTAs, la
metodolog铆a de dise帽o empleada, la demostraci贸n del uso de t茅cnicas novedosas en una
aplicaci贸n como la elegida que tiene relevancia tecnol贸gica e inter茅s acad茅mico; esperamos
que todo ello constituya una contribuci贸n valiosa para la comunidad cient铆fica en
microelectr贸nica y un conjunto de herramientas de utilidad para el dise帽o de circuitos