Engineering interband tunneling in nanowires with diamond cubic or zincblende crystalline structure based on atomistic modeling

We present an investigation in the device parameter space of band-to-band tunneling in nanowires with a diamond cubic or zincblende crystalline structure. Results are obtained from quantum transport simulations based on Non-Equilibrium Green's functions with a tight-binding atomistic Hamiltonian. Interband tunneling is extremely sensitive to the longitudinal electric field, to the nanowire cross section, through the gap, and to the material. We have derived an approximate analytical expression for the transmission probability based on WKB theory and on a proper choice of the effective interband tunneling mass, which shows good agreement with results from atomistic quantum simulation.Comment: 4 pages, 3 figures. Final version, published in IEEE Trans. Nanotechnol. It differs from the previous arXiv version for the title and for some changes in the text and in the reference

Carrier Transport in High Mobility InAs Nanowire Junctionless Transistors

Ability to understand and model the performance limits of nanowire transistors is the key to design of next generation devices. Here, we report studies on high-mobility junction-less gate-all-around nanowire field effect transistor with carrier mobility reaching 2000 cm2/V.s at room temperature. Temperature-dependent transport measurements reveal activated transport at low temperatures due to surface donors, while at room temperature the transport shows a diffusive behavior. From the conductivity data, the extracted value of sound velocity in InAs nanowires is found to be an order less than the bulk. This low sound velocity is attributed to the extended crystal defects that ubiquitously appear in these nanowires. Analyzing the temperature-dependent mobility data, we identify the key scattering mechanisms limiting the carrier transport in these nanowires. Finally, using these scattering models, we perform drift-diffusion based transport simulations of a nanowire field-effect transistor and compare the device performances with experimental measurements. Our device modeling provides insight into performance limits of InAs nanowire transistors and can be used as a predictive methodology for nanowire-based integrated circuits.Comment: 22 pages, 5 Figures, Nano Letter

Analytical model of nanowire FETs in a partially ballistic or dissipative transport regime

The intermediate transport regime in nanoscale transistors between the fully ballistic case and the quasi equilibrium case described by the drift-diffusion model is still an open modeling issue. Analytical approaches to the problem have been proposed, based on the introduction of a backscattering coefficient, or numerical approaches consisting in the MonteCarlo solution of the Boltzmann transport equation or in the introduction of dissipation in quantum transport descriptions. In this paper we propose a very simple analytical model to seamlessly cover the whole range of transport regimes in generic quasi-one dimensional field-effect transistors, and apply it to silicon nanowire transistors. The model is based on describing a generic transistor as a chain of ballistic nanowire transistors in series, or as the series of a ballistic transistor and a drift-diffusion transistor operating in the triode region. As an additional result, we find a relation between the mobility and the mean free path, that has deep consequences on the understanding of transport in nanoscale devices

Effects of Parasitics and Interface Traps On Ballistic Nanowire FET In The Ultimate Quantum Capacitance Limit

In this paper, we focus on the performance of a nanowire Field Effect Transistor (FET) in the Ultimate Quantum Capacitance Limit (UQCL) (where only one subband is occupied) in the presence of interface traps ($D_{it}$), parasitic capacitance ($C_L$) and source/drain series resistance ($R_{s,d}$) using a ballistic transport model and compare the performance with its Classical Capacitance Limit (CCL) counterpart. We discuss four different aspects relevant to the present scenario, namely, (i) gate voltage dependent capacitance, (ii) saturation of the drain current, (iii) the subthreshold slope and (iv) the scaling performance. To gain physical insights into these effects, we also develop a set of semi-analytical equations. The key observations are: (1) A strongly energy-quantized nanowire shows non-monotonic multiple peak C-V characteristics due to discrete contributions from individual subbands; (2) The ballistic drain current saturates better in the UQCL compared to CCL, both in presence and absence of $D_{it}$ and $R_{s,d}$; (3) The subthreshold slope does not suffer any relative degradation in the UQCL compared to CCL, even with $D_{it}$ and $R_{s,d}$; (4) UQCL scaling outperforms CCL in the ideal condition; (5) UQCL scaling is more immune to $R_{s,d}$, but presence of $D_{it}$ and $C_L$ significantly degrades scaling advantages in the UQCL.Comment: Accepted at IEEE Transactions on Electron Device