Mapping multimode system communication to a network-on-a-chip (NoC)

Decisions regarding the mapping of system-on-chip (SoC) components onto a NoC become more difficult with increasing complexity of system design. These complex systems capable of providing multiple functionalities tend to operate in multiple modes of operation. Modeling the system communication in these multimodes aids in efficient system design. This research provides a heuristic that gives a flexible mapping solution of the multimode system communications onto the NoC topology of choice. The solution specifies the immediate neighbors of the SoC components and the routes taken by all communications in the system. We validate the mapping results with a network-on-chip simulator (NoCSim). This thesis also investigates the cost associated with the interfacing of the components to the NoC. With the goal of reducing communication latency, we examine the packetization strategies in the NoC communication. Three schemes of implementations were analyzed, and the costs in terms of latency, and area were projected through actual synthesis

Schedulability-Driven Performance Analysis of Multiple Mode Embedded Real-Time Systems

Providing multiple modes to support dynamically changing environments, standards, and new services is prevalent in embedded systems, especially in mobile radio systems. Because such a system frequently contains time-constrained tasks, it is important to analyze the temporal requirements as well as the functional correctness. This paper presents a method to analyze temporal requirements imposed on an embedded real-time system supporting multiple modes. While most performance analysis methods focus only on testing the feasibility of a task or a system, our method goes further by addressing the problem of locating hot spots of a system thereby helping the designer to choose among alternative designs or architectures. We formally define the analysis problem and show that it is very unlikely to be solved efficiently. We present a heuristic algorithm, which is accurate and fast enough to be used in iterative processes in system-level analysis and design. The analysis problem is extended to accommodate probabilistic behavior exhibited by soft real-time tasks.