65,531 research outputs found
Row-column directed block designs
AbstractA balanced incomplete block design (BIBD) is called a row-column directed BIBD (RCDBIBD) if: 1.(i) it is directed in the usual sense, i.e., each ordered pair of points occurs an equal number of times in the blocks (directed column wise), and2.(ii) the blocks are arranged in such a way that (a) each point occurs an equal number of times in each row, and (b) each ordered pair of distinct points occurs an almost equal number of times in the rows.The present paper gives construction techniques for RCDBIBDs and proves that the necessary conditions are sufficient for the existence of RCDBIBDs with block size 2. Existence of RCDBIBDs with block size 3 and v ≡ 1 mod 6 is shown and it is proved that an RCDBIBD(7,7,4,4,1∗) does not exist
Counterbalancing for serial order carryover effects in experimental condition orders
Reactions of neural, psychological, and social systems are rarely, if ever, independent of previous inputs and states. The potential for serial order carryover effects from one condition to the next in a sequence of experimental trials makes counterbalancing of condition order an essential part of experimental design. Here, a method is proposed for generating counterbalanced sequences for repeated-measures designs including those with multiple observations of each condition on one participant and self-adjacencies of conditions. Condition ordering is reframed as a graph theory problem. Experimental conditions are represented as vertices in a graph and directed edges between them represent temporal relationships between conditions. A counterbalanced trial order results from traversing an Euler circuit through such a graph in which each edge is traversed exactly once. This method can be generalized to counterbalance for higher order serial order carryover effects as well as to create intentional serial order biases. Modern graph theory provides tools for finding other types of paths through such graph representations, providing a tool for generating experimental condition sequences with useful properties
Gate-Level Simulation of Quantum Circuits
While thousands of experimental physicists and chemists are currently trying
to build scalable quantum computers, it appears that simulation of quantum
computation will be at least as critical as circuit simulation in classical
VLSI design. However, since the work of Richard Feynman in the early 1980s
little progress was made in practical quantum simulation. Most researchers
focused on polynomial-time simulation of restricted types of quantum circuits
that fall short of the full power of quantum computation. Simulating quantum
computing devices and useful quantum algorithms on classical hardware now
requires excessive computational resources, making many important simulation
tasks infeasible. In this work we propose a new technique for gate-level
simulation of quantum circuits which greatly reduces the difficulty and cost of
such simulations. The proposed technique is implemented in a simulation tool
called the Quantum Information Decision Diagram (QuIDD) and evaluated by
simulating Grover's quantum search algorithm. The back-end of our package,
QuIDD Pro, is based on Binary Decision Diagrams, well-known for their ability
to efficiently represent many seemingly intractable combinatorial structures.
This reliance on a well-established area of research allows us to take
advantage of existing software for BDD manipulation and achieve unparalleled
empirical results for quantum simulation
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