Retargetable graph-coloring register allocation for irregular architectures

Abstract. Global register allocation is one of the most important optimizations in a compiler. Since the early 80’s, register allocation by graph coloring has been the dominant approach. The traditional formulation of graph-coloring register allocation implicitly assumes a single bank of non-overlapping general-purpose registers and does not handle irregular architectural features like overlapping register pairs, special purpose registers, and multiple register banks. We present a generalization of graph-coloring register allocation that can handle all such irregularities. The algorithm is parameterized on a formal target description, allowing fully automatic retargeting. We report on experiments conducted with a prototype implementation in a framework based on a commercial compiler.

Parameterization and adaptive search for graph coloring register allocation

Graph coloring register allocators use heuristics for register coalescing and allocation, which are relevant to the number of physical registers that a group of virtual registers will use after allocation. They cannot be determined accurately in allocation, thus we made them tunable by introducing new parameters as the thresholds for coalescing and the thresholds for defining constrained live intervals in simplification. Experiments demonstrated neither the aggressive method nor the conservative method can outperform the other for all tests and the best parameters vary significantly among programs. This parameterization is profitable because the best running time reached by varying the parameters is up to 16% faster than the best of fixed-parameter methods. Hill-climbing and random probe algorithms were used to find good parameters, and the later performed better. Further analysis reveals the search space has many irregular fluctuations that are not suitable for the hill-climber

Softwareframework für Prozessoren mit variablen Befehlssatzarchitekturen

Die Kahrisma-Architektur erlaubt mittels grobgranularer Rekonfiguration der Mikroarchitektur das Umschalten zwischen einfacher und komplexer Prozessoren. Eine effiziente Umsetzung dieser Flexibilität erfordert allerdings die Verwendung einer rekonfigurierbaren Befehlssatzarchitektur (ISA). Daher wurde innerhalb dieser Arbeit ein mixed-ISA Softwareframework realisiert, das die Programmierung von C/C++-Anwendungen mit variablen ISAs ermöglicht und anhand der Kahrisma-Architektur demonstriert