Smart Sensor Technologies for IoT

The recent development in wireless networks and devices has led to novel services that will utilize wireless communication on a new level. Much effort and resources have been dedicated to establishing new communication networks that will support machine-to-machine communication and the Internet of Things (IoT). In these systems, various smart and sensory devices are deployed and connected, enabling large amounts of data to be streamed. Smart services represent new trends in mobile services, i.e., a completely new spectrum of context-aware, personalized, and intelligent services and applications. A variety of existing services utilize information about the position of the user or mobile device. The position of mobile devices is often achieved using the Global Navigation Satellite System (GNSS) chips that are integrated into all modern mobile devices (smartphones). However, GNSS is not always a reliable source of position estimates due to multipath propagation and signal blockage. Moreover, integrating GNSS chips into all devices might have a negative impact on the battery life of future IoT applications. Therefore, alternative solutions to position estimation should be investigated and implemented in IoT applications. This Special Issue, “Smart Sensor Technologies for IoT” aims to report on some of the recent research efforts on this increasingly important topic. The twelve accepted papers in this issue cover various aspects of Smart Sensor Technologies for IoT

GRAPE-6: The massively-parallel special-purpose computer for astrophysical particle simulation

In this paper, we describe the architecture and performance of the GRAPE-6 system, a massively-parallel special-purpose computer for astrophysical $N$-body simulations. GRAPE-6 is the successor of GRAPE-4, which was completed in 1995 and achieved the theoretical peak speed of 1.08 Tflops. As was the case with GRAPE-4, the primary application of GRAPE-6 is simulation of collisional systems, though it can be used for collisionless systems. The main differences between GRAPE-4 and GRAPE-6 are (a) The processor chip of GRAPE-6 integrates 6 force-calculation pipelines, compared to one pipeline of GRAPE-4 (which needed 3 clock cycles to calculate one interaction), (b) the clock speed is increased from 32 to 90 MHz, and (c) the total number of processor chips is increased from 1728 to 2048. These improvements resulted in the peak speed of 64 Tflops. We also discuss the design of the successor of GRAPE-6.Comment: Accepted for publication in PASJ, scheduled to appear in Vol. 55, No.

DeSyRe: on-Demand System Reliability

The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect and fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints

Initial synchronisation of wideband and UWB direct sequence systems: single- and multiple-antenna aided solutions

This survey guides the reader through the open literature on the principle of initial synchronisation in single-antenna-assisted single- and multi-carrier Code Division Multiple Access (CDMA) as well as Direct Sequence-Ultra WideBand (DS-UWB) systems, with special emphasis on the DownLink (DL). There is a paucity of up-to-date surveys and review articles on initial synchronization solutions for MIMO-aided and cooperative systems - even though there is a plethora of papers on both MIMOs and on cooperative systems, which assume perfect synchronization. Hence this paper aims to ?ll the related gap in the literature

On the Impact of Channel Cross-Correlations in High-Sensitivity Receivers for Galileo E1 OS and GPS L1C Signals

One of the most promising features of the modernized global navigation satellite systems signals is the presence of pilot channels that, being data-transition free, allow for increasing the coherent integration time of the receivers. Generally speaking, the increased integration time allows to better average the thermal noise component, thus improving the postcorrelation SNR of the receiver in the acquisition phase. On the other hand, for a standalone receiver which is not aided or assisted, the acquisition architecture requires that only the pilot channel is processed, at least during the first steps of the procedure. The aim of this paper is to present a detailed investigation on the impact of the code cross-correlation properties in the reception of Galileo E1 Open Service and GPS L1C civil signals. Analytical and simulation results demonstrate that the S-curve of the code synchronization loop can be affected by a bias around the lock point. This effect depends on the code cross-correlation properties and on the receiver setup. Furthermore, in these cases, the sensitivity of the receiver to other error sources might increase, and the paper shows how in presence of an interfering signal the pseudorange bias can be magnified and lead to relevant performance degradatio